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claudiubezneageertu
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clk: renesas: rzg2l: Remove critical area
The spinlock in rzg2l_mod_clock_endisable() is intended to protect RMW-accesses to the hardware register. There is no need to protect instructions that set temporary variables which will be written afterwards to a hardware register. With this only one write to one clock register is executed thus locking/unlocking rmw_lock is removed. Signed-off-by: Claudiu Beznea <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
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drivers/clk/renesas/rzg2l-cpg.c

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -895,7 +895,6 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable)
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struct rzg2l_cpg_priv *priv = clock->priv;
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unsigned int reg = clock->off;
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struct device *dev = priv->dev;
898-
unsigned long flags;
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u32 bitmask = BIT(clock->bit);
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u32 value;
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int error;
@@ -907,14 +906,12 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable)
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dev_dbg(dev, "CLK_ON %u/%pC %s\n", CLK_ON_R(reg), hw->clk,
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enable ? "ON" : "OFF");
910-
spin_lock_irqsave(&priv->rmw_lock, flags);
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value = bitmask << 16;
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if (enable)
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value |= bitmask;
915-
writel(value, priv->base + CLK_ON_R(reg));
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917-
spin_unlock_irqrestore(&priv->rmw_lock, flags);
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writel(value, priv->base + CLK_ON_R(reg));
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if (!enable)
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return 0;

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