@@ -330,20 +330,27 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type)
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switch (flow_type ) {
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case IRQ_TYPE_LEVEL_HIGH :
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sprd_eic_update (chip , offset , SPRD_EIC_DBNC_IEV , 1 );
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+ sprd_eic_update (chip , offset , SPRD_EIC_DBNC_IC , 1 );
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break ;
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case IRQ_TYPE_LEVEL_LOW :
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sprd_eic_update (chip , offset , SPRD_EIC_DBNC_IEV , 0 );
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+ sprd_eic_update (chip , offset , SPRD_EIC_DBNC_IC , 1 );
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break ;
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case IRQ_TYPE_EDGE_RISING :
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case IRQ_TYPE_EDGE_FALLING :
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case IRQ_TYPE_EDGE_BOTH :
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state = sprd_eic_get (chip , offset );
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- if (state )
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+ if (state ) {
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sprd_eic_update (chip , offset ,
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SPRD_EIC_DBNC_IEV , 0 );
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- else
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+ sprd_eic_update (chip , offset ,
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+ SPRD_EIC_DBNC_IC , 1 );
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+ } else {
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sprd_eic_update (chip , offset ,
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SPRD_EIC_DBNC_IEV , 1 );
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+ sprd_eic_update (chip , offset ,
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+ SPRD_EIC_DBNC_IC , 1 );
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+ }
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break ;
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default :
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return - ENOTSUPP ;
@@ -355,20 +362,27 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type)
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switch (flow_type ) {
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case IRQ_TYPE_LEVEL_HIGH :
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sprd_eic_update (chip , offset , SPRD_EIC_LATCH_INTPOL , 0 );
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+ sprd_eic_update (chip , offset , SPRD_EIC_LATCH_INTCLR , 1 );
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break ;
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case IRQ_TYPE_LEVEL_LOW :
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sprd_eic_update (chip , offset , SPRD_EIC_LATCH_INTPOL , 1 );
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+ sprd_eic_update (chip , offset , SPRD_EIC_LATCH_INTCLR , 1 );
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break ;
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case IRQ_TYPE_EDGE_RISING :
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case IRQ_TYPE_EDGE_FALLING :
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case IRQ_TYPE_EDGE_BOTH :
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state = sprd_eic_get (chip , offset );
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- if (state )
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+ if (state ) {
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sprd_eic_update (chip , offset ,
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SPRD_EIC_LATCH_INTPOL , 0 );
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- else
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+ sprd_eic_update (chip , offset ,
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+ SPRD_EIC_LATCH_INTCLR , 1 );
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+ } else {
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sprd_eic_update (chip , offset ,
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SPRD_EIC_LATCH_INTPOL , 1 );
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+ sprd_eic_update (chip , offset ,
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+ SPRD_EIC_LATCH_INTCLR , 1 );
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+ }
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break ;
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default :
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return - ENOTSUPP ;
@@ -382,29 +396,34 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type)
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sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTBOTH , 0 );
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sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTMODE , 0 );
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sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTPOL , 1 );
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+ sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTCLR , 1 );
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irq_set_handler_locked (data , handle_edge_irq );
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break ;
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case IRQ_TYPE_EDGE_FALLING :
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sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTBOTH , 0 );
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sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTMODE , 0 );
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sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTPOL , 0 );
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+ sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTCLR , 1 );
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irq_set_handler_locked (data , handle_edge_irq );
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break ;
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case IRQ_TYPE_EDGE_BOTH :
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sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTMODE , 0 );
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sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTBOTH , 1 );
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+ sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTCLR , 1 );
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irq_set_handler_locked (data , handle_edge_irq );
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break ;
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case IRQ_TYPE_LEVEL_HIGH :
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sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTBOTH , 0 );
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sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTMODE , 1 );
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sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTPOL , 1 );
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+ sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTCLR , 1 );
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irq_set_handler_locked (data , handle_level_irq );
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break ;
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case IRQ_TYPE_LEVEL_LOW :
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sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTBOTH , 0 );
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sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTMODE , 1 );
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sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTPOL , 0 );
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+ sprd_eic_update (chip , offset , SPRD_EIC_ASYNC_INTCLR , 1 );
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irq_set_handler_locked (data , handle_level_irq );
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break ;
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default :
@@ -417,29 +436,34 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type)
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sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTBOTH , 0 );
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sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTMODE , 0 );
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sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTPOL , 1 );
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+ sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTCLR , 1 );
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irq_set_handler_locked (data , handle_edge_irq );
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break ;
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case IRQ_TYPE_EDGE_FALLING :
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sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTBOTH , 0 );
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sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTMODE , 0 );
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sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTPOL , 0 );
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+ sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTCLR , 1 );
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irq_set_handler_locked (data , handle_edge_irq );
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break ;
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case IRQ_TYPE_EDGE_BOTH :
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sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTMODE , 0 );
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sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTBOTH , 1 );
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+ sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTCLR , 1 );
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irq_set_handler_locked (data , handle_edge_irq );
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break ;
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case IRQ_TYPE_LEVEL_HIGH :
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sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTBOTH , 0 );
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sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTMODE , 1 );
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sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTPOL , 1 );
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+ sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTCLR , 1 );
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irq_set_handler_locked (data , handle_level_irq );
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break ;
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case IRQ_TYPE_LEVEL_LOW :
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sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTBOTH , 0 );
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sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTMODE , 1 );
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sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTPOL , 0 );
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+ sprd_eic_update (chip , offset , SPRD_EIC_SYNC_INTCLR , 1 );
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irq_set_handler_locked (data , handle_level_irq );
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break ;
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default :
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