|
45 | 45 | regulator-max-microvolt = <1800000>;
|
46 | 46 | regulator-always-on;
|
47 | 47 | };
|
| 48 | + |
| 49 | + hdmi: connector { |
| 50 | + compatible = "hdmi-connector"; |
| 51 | + label = "hdmi"; |
| 52 | + |
| 53 | + type = "a"; |
| 54 | + |
| 55 | + port { |
| 56 | + hdmi_connector_in: endpoint { |
| 57 | + remote-endpoint = <&sii9022_out>; |
| 58 | + }; |
| 59 | + }; |
| 60 | + }; |
48 | 61 | };
|
49 | 62 |
|
50 | 63 | &k2g_pinctrl {
|
|
89 | 102 | >;
|
90 | 103 | };
|
91 | 104 |
|
| 105 | + i2c1_pins: pinmux_i2c1_pins { |
| 106 | + pinctrl-single,pins = < |
| 107 | + K2G_CORE_IOPAD(0x1384) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c1_scl.i2c1_scl */ |
| 108 | + K2G_CORE_IOPAD(0x1388) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c1_sda.i2c1_sda */ |
| 109 | + >; |
| 110 | + }; |
| 111 | + |
92 | 112 | ecap0_pins: ecap0_pins {
|
93 | 113 | pinctrl-single,pins = <
|
94 | 114 | K2G_CORE_IOPAD(0x1374) (BUFFER_CLASS_B | MUX_MODE4) /* pr1_mdio_data.ecap0_in_apwm0_out */
|
|
160 | 180 | K2G_CORE_IOPAD(0x1188) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* MDIO_DATA.MDIO_DATA */
|
161 | 181 | >;
|
162 | 182 | };
|
| 183 | + |
| 184 | + vout_pins: pinmux_vout_pins { |
| 185 | + pinctrl-single,pins = < |
| 186 | + K2G_CORE_IOPAD(0x1078) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata23.dssdata23 */ |
| 187 | + K2G_CORE_IOPAD(0x107c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata22.dssdata22 */ |
| 188 | + K2G_CORE_IOPAD(0x1080) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata21.dssdata21 */ |
| 189 | + K2G_CORE_IOPAD(0x1084) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata20.dssdata20 */ |
| 190 | + K2G_CORE_IOPAD(0x1088) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata19.dssdata19 */ |
| 191 | + K2G_CORE_IOPAD(0x108c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata18.dssdata18 */ |
| 192 | + K2G_CORE_IOPAD(0x1090) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata17.dssdata17 */ |
| 193 | + K2G_CORE_IOPAD(0x1094) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata16.dssdata16 */ |
| 194 | + K2G_CORE_IOPAD(0x1098) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata15.dssdata15 */ |
| 195 | + K2G_CORE_IOPAD(0x109c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata14.dssdata14 */ |
| 196 | + K2G_CORE_IOPAD(0x10a0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata13.dssdata13 */ |
| 197 | + K2G_CORE_IOPAD(0x10a4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata12.dssdata12 */ |
| 198 | + K2G_CORE_IOPAD(0x10a8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata11.dssdata11 */ |
| 199 | + K2G_CORE_IOPAD(0x10ac) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata10.dssdata10 */ |
| 200 | + K2G_CORE_IOPAD(0x10b0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata9.dssdata9 */ |
| 201 | + K2G_CORE_IOPAD(0x10b4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata8.dssdata8 */ |
| 202 | + K2G_CORE_IOPAD(0x10b8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata7.dssdata7 */ |
| 203 | + K2G_CORE_IOPAD(0x10bc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata6.dssdata6 */ |
| 204 | + K2G_CORE_IOPAD(0x10c0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata5.dssdata5 */ |
| 205 | + K2G_CORE_IOPAD(0x10c4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata4.dssdata4 */ |
| 206 | + K2G_CORE_IOPAD(0x10c8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata3.dssdata3 */ |
| 207 | + K2G_CORE_IOPAD(0x10cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata2.dssdata2 */ |
| 208 | + K2G_CORE_IOPAD(0x10d0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata1.dssdata1 */ |
| 209 | + K2G_CORE_IOPAD(0x10d4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata0.dssdata0 */ |
| 210 | + K2G_CORE_IOPAD(0x10d8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssvsync.dssvsync */ |
| 211 | + K2G_CORE_IOPAD(0x10dc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dsshsync.dsshsync */ |
| 212 | + K2G_CORE_IOPAD(0x10e0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dsspclk.dsspclk */ |
| 213 | + K2G_CORE_IOPAD(0x10e4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssde.dssde */ |
| 214 | + K2G_CORE_IOPAD(0x10e8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssfid.dssfid */ |
| 215 | + >; |
| 216 | + }; |
163 | 217 | };
|
164 | 218 |
|
165 | 219 | &uart0 {
|
|
357 | 411 | pinctrl-0 = <&emac_pins>;
|
358 | 412 | status = "okay";
|
359 | 413 | };
|
| 414 | + |
| 415 | +&i2c1 { |
| 416 | + pinctrl-names = "default"; |
| 417 | + pinctrl-0 = <&i2c1_pins>; |
| 418 | + status = "okay"; |
| 419 | + clock-frequency = <400000>; |
| 420 | + |
| 421 | + sii9022: sii9022@3b { |
| 422 | + #sound-dai-cells = <0>; |
| 423 | + compatible = "sil,sii9022"; |
| 424 | + reg = <0x3b>; |
| 425 | + |
| 426 | + ports { |
| 427 | + #address-cells = <1>; |
| 428 | + #size-cells = <0>; |
| 429 | + |
| 430 | + port@0 { |
| 431 | + reg = <0>; |
| 432 | + |
| 433 | + sii9022_in: endpoint { |
| 434 | + remote-endpoint = <&dpi_out>; |
| 435 | + }; |
| 436 | + }; |
| 437 | + |
| 438 | + port@1 { |
| 439 | + reg = <1>; |
| 440 | + |
| 441 | + sii9022_out: endpoint { |
| 442 | + remote-endpoint = <&hdmi_connector_in>; |
| 443 | + }; |
| 444 | + }; |
| 445 | + }; |
| 446 | + }; |
| 447 | +}; |
| 448 | + |
| 449 | +&dss { |
| 450 | + pinctrl-names = "default"; |
| 451 | + pinctrl-0 = <&vout_pins>; |
| 452 | + status = "ok"; |
| 453 | + |
| 454 | + port { |
| 455 | + dpi_out: endpoint { |
| 456 | + remote-endpoint = <&sii9022_in>; |
| 457 | + data-lines = <24>; |
| 458 | + }; |
| 459 | + }; |
| 460 | +}; |
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