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Andre-ARMsudeep-holla
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arm64: dts: fvp/juno: Fix serial node names
The UARTs for all Arm Ltd. boards were using "uart" as their node name stub. Replace that with the required "serial" string, to comply with the PL011 DT binding. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andre Przywara <[email protected]> Signed-off-by: Sudeep Holla <[email protected]>
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-13
lines changed

4 files changed

+13
-13
lines changed

arch/arm/boot/dts/vexpress-v2m-rs1.dtsi

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -316,31 +316,31 @@
316316
clock-names = "KMIREFCLK", "apb_pclk";
317317
};
318318

319-
v2m_serial0: uart@90000 {
319+
v2m_serial0: serial@90000 {
320320
compatible = "arm,pl011", "arm,primecell";
321321
reg = <0x090000 0x1000>;
322322
interrupts = <5>;
323323
clocks = <&v2m_oscclk2>, <&smbclk>;
324324
clock-names = "uartclk", "apb_pclk";
325325
};
326326

327-
v2m_serial1: uart@a0000 {
327+
v2m_serial1: serial@a0000 {
328328
compatible = "arm,pl011", "arm,primecell";
329329
reg = <0x0a0000 0x1000>;
330330
interrupts = <6>;
331331
clocks = <&v2m_oscclk2>, <&smbclk>;
332332
clock-names = "uartclk", "apb_pclk";
333333
};
334334

335-
v2m_serial2: uart@b0000 {
335+
v2m_serial2: serial@b0000 {
336336
compatible = "arm,pl011", "arm,primecell";
337337
reg = <0x0b0000 0x1000>;
338338
interrupts = <7>;
339339
clocks = <&v2m_oscclk2>, <&smbclk>;
340340
clock-names = "uartclk", "apb_pclk";
341341
};
342342

343-
v2m_serial3: uart@c0000 {
343+
v2m_serial3: serial@c0000 {
344344
compatible = "arm,pl011", "arm,primecell";
345345
reg = <0x0c0000 0x1000>;
346346
interrupts = <8>;

arch/arm64/boot/dts/arm/foundation-v8.dtsi

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -189,31 +189,31 @@
189189
reg = <0x010000 0x1000>;
190190
};
191191

192-
v2m_serial0: uart@90000 {
192+
v2m_serial0: serial@90000 {
193193
compatible = "arm,pl011", "arm,primecell";
194194
reg = <0x090000 0x1000>;
195195
interrupts = <5>;
196196
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
197197
clock-names = "uartclk", "apb_pclk";
198198
};
199199

200-
v2m_serial1: uart@a0000 {
200+
v2m_serial1: serial@a0000 {
201201
compatible = "arm,pl011", "arm,primecell";
202202
reg = <0x0a0000 0x1000>;
203203
interrupts = <6>;
204204
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
205205
clock-names = "uartclk", "apb_pclk";
206206
};
207207

208-
v2m_serial2: uart@b0000 {
208+
v2m_serial2: serial@b0000 {
209209
compatible = "arm,pl011", "arm,primecell";
210210
reg = <0x0b0000 0x1000>;
211211
interrupts = <7>;
212212
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
213213
clock-names = "uartclk", "apb_pclk";
214214
};
215215

216-
v2m_serial3: uart@c0000 {
216+
v2m_serial3: serial@c0000 {
217217
compatible = "arm,pl011", "arm,primecell";
218218
reg = <0x0c0000 0x1000>;
219219
interrupts = <8>;

arch/arm64/boot/dts/arm/juno-base.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -729,7 +729,7 @@
729729
};
730730
};
731731

732-
soc_uart0: uart@7ff80000 {
732+
soc_uart0: serial@7ff80000 {
733733
compatible = "arm,pl011", "arm,primecell";
734734
reg = <0x0 0x7ff80000 0x0 0x1000>;
735735
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;

arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -158,31 +158,31 @@
158158
clock-names = "KMIREFCLK", "apb_pclk";
159159
};
160160

161-
v2m_serial0: uart@90000 {
161+
v2m_serial0: serial@90000 {
162162
compatible = "arm,pl011", "arm,primecell";
163163
reg = <0x090000 0x1000>;
164164
interrupts = <5>;
165165
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
166166
clock-names = "uartclk", "apb_pclk";
167167
};
168168

169-
v2m_serial1: uart@a0000 {
169+
v2m_serial1: serial@a0000 {
170170
compatible = "arm,pl011", "arm,primecell";
171171
reg = <0x0a0000 0x1000>;
172172
interrupts = <6>;
173173
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
174174
clock-names = "uartclk", "apb_pclk";
175175
};
176176

177-
v2m_serial2: uart@b0000 {
177+
v2m_serial2: serial@b0000 {
178178
compatible = "arm,pl011", "arm,primecell";
179179
reg = <0x0b0000 0x1000>;
180180
interrupts = <7>;
181181
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
182182
clock-names = "uartclk", "apb_pclk";
183183
};
184184

185-
v2m_serial3: uart@c0000 {
185+
v2m_serial3: serial@c0000 {
186186
compatible = "arm,pl011", "arm,primecell";
187187
reg = <0x0c0000 0x1000>;
188188
interrupts = <8>;

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