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arm64: dts: qcom: sm8550: add Soundwire controllers
Add nodes for LPASS Soundwire v2.0.0 controllers. Use labels with indices matching downstream DTS, to make any comparisons easier. Signed-off-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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arch/arm64/boot/dts/qcom/sm8550.dtsi

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@@ -2011,6 +2011,33 @@
20112011
#sound-dai-cells = <1>;
20122012
};
20132013

2014+
swr3: soundwire-controller@6ab0000 {
2015+
compatible = "qcom,soundwire-v2.0.0";
2016+
reg = <0 0x06ab0000 0 0x10000>;
2017+
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
2018+
clocks = <&lpass_wsa2macro>;
2019+
clock-names = "iface";
2020+
label = "WSA2";
2021+
2022+
qcom,din-ports = <4>;
2023+
qcom,dout-ports = <9>;
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2025+
qcom,ports-sinterval = <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x18f 0xff 0xff 0x0f 0x0f 0xff 0x31f>;
2026+
qcom,ports-offset1 = /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x00 0xff 0xff 0x06 0x0d 0xff 0x00>;
2027+
qcom,ports-offset2 = /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
2028+
qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>;
2029+
qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>;
2030+
qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x18>;
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qcom,ports-block-pack-mode = /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00 0x01 0x01 0x00 0x00>;
2032+
qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
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qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
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2035+
#address-cells = <2>;
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#size-cells = <0>;
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#sound-dai-cells = <1>;
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status = "disabled";
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};
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20142041
lpass_rxmacro: codec@6ac0000 {
20152042
compatible = "qcom,sm8550-lpass-rx-macro";
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reg = <0 0x06ac0000 0 0x1000>;
@@ -2030,6 +2057,33 @@
20302057
#sound-dai-cells = <1>;
20312058
};
20322059

2060+
swr1: soundwire-controller@6ad0000 {
2061+
compatible = "qcom,soundwire-v2.0.0";
2062+
reg = <0 0x06ad0000 0 0x10000>;
2063+
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
2064+
clocks = <&lpass_rxmacro>;
2065+
clock-names = "iface";
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label = "RX";
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2068+
qcom,din-ports = <0>;
2069+
qcom,dout-ports = <10>;
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2071+
qcom,ports-sinterval = <0x03 0x3f 0x1f 0x07 0x00 0x18f 0xff 0xff 0xff 0xff>;
2072+
qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x00 0x00 0xff 0xff 0xff 0xff>;
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qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00 0x00 0xff 0xff 0xff 0xff>;
2074+
qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff>;
2075+
qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff>;
2076+
qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff 0x0f 0xff 0xff 0xff 0xff>;
2077+
qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff 0x00 0xff 0xff 0xff 0xff>;
2078+
qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00 0x00 0xff 0xff 0xff 0xff>;
2079+
qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00 0x00 0xff 0xff 0xff 0xff>;
2080+
2081+
#address-cells = <2>;
2082+
#size-cells = <0>;
2083+
#sound-dai-cells = <1>;
2084+
status = "disabled";
2085+
};
2086+
20332087
lpass_txmacro: codec@6ae0000 {
20342088
compatible = "qcom,sm8550-lpass-tx-macro";
20352089
reg = <0 0x06ae0000 0 0x1000>;
@@ -2068,6 +2122,61 @@
20682122
#sound-dai-cells = <1>;
20692123
};
20702124

2125+
swr0: soundwire-controller@6b10000 {
2126+
compatible = "qcom,soundwire-v2.0.0";
2127+
reg = <0 0x06b10000 0 0x10000>;
2128+
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
2129+
clocks = <&lpass_wsamacro>;
2130+
clock-names = "iface";
2131+
label = "WSA";
2132+
2133+
qcom,din-ports = <4>;
2134+
qcom,dout-ports = <9>;
2135+
2136+
qcom,ports-sinterval = <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x18f 0xff 0xff 0x0f 0x0f 0xff 0x31f>;
2137+
qcom,ports-offset1 = /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x00 0xff 0xff 0x06 0x0d 0xff 0x00>;
2138+
qcom,ports-offset2 = /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
2139+
qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>;
2140+
qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>;
2141+
qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x18>;
2142+
qcom,ports-block-pack-mode = /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00 0x01 0x01 0x00 0x00>;
2143+
qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
2144+
qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
2145+
2146+
#address-cells = <2>;
2147+
#size-cells = <0>;
2148+
#sound-dai-cells = <1>;
2149+
status = "disabled";
2150+
};
2151+
2152+
swr2: soundwire-controller@6d30000 {
2153+
compatible = "qcom,soundwire-v2.0.0";
2154+
reg = <0 0x06d30000 0 0x10000>;
2155+
interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
2156+
<GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>;
2157+
interrupt-names = "core", "wakeup";
2158+
clocks = <&lpass_vamacro>;
2159+
clock-names = "iface";
2160+
label = "TX";
2161+
2162+
qcom,din-ports = <4>;
2163+
qcom,dout-ports = <0>;
2164+
qcom,ports-sinterval-low = /bits/ 8 <0x01 0x01 0x03 0x03>;
2165+
qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x01 0x01>;
2166+
qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00 0x00>;
2167+
qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff>;
2168+
qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff>;
2169+
qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff>;
2170+
qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0xff 0xff>;
2171+
qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff>;
2172+
qcom,ports-lane-control = /bits/ 8 <0x01 0x02 0x00 0x00>;
2173+
2174+
#address-cells = <2>;
2175+
#size-cells = <0>;
2176+
#sound-dai-cells = <1>;
2177+
status = "disabled";
2178+
};
2179+
20712180
lpass_vamacro: codec@6d44000 {
20722181
compatible = "qcom,sm8550-lpass-va-macro";
20732182
reg = <0 0x06d44000 0 0x1000>;

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