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Merge tag 'pinctrl-v6.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control fixes from Linus Walleij: - Use flag saving spinlocks in the Renesas rzg2l driver. This fixes up PREEMPT_RT problems. - Remove broken Qualcomm PM8008 that clearly was never working. A new version will arrive in the next merge window. - Add a quirk for LP8764 regmap that was missed and made the TI J7200 board unusable. - Fix persistance on the BCM2835 GPIO outputs kernel parameter so this remains consisten across a booted kernel. - Fix a potential deadlock in create_pinctrl() - Fix some erroneous bitfields and pinmux reset in the Rockchip RK3328 driver. * tag 'pinctrl-v6.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: rockchip: fix pinmux reset in rockchip_pmx_set pinctrl: rockchip: use dedicated pinctrl type for RK3328 pinctrl: rockchip: fix pinmux bits for RK3328 GPIO3-B pins pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pins pinctrl: fix deadlock in create_pinctrl() when handling -EPROBE_DEFER pinctrl: bcm2835: Fix permissions of persist_gpio_outputs pinctrl: tps6594: add missing support for LP8764 PMIC dt-bindings: pinctrl: qcom,pmic-gpio: drop pm8008 pinctrl: qcom: spmi-gpio: drop broken pm8008 support pinctrl: renesas: rzg2l: Use spin_{lock,unlock}_irq{save,restore}
2 parents f266106 + 4ea4d48 commit 626737a

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lines changed

8 files changed

+65
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lines changed

‎Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,6 @@ properties:
2929
- qcom,pm7325-gpio
3030
- qcom,pm7550ba-gpio
3131
- qcom,pm8005-gpio
32-
- qcom,pm8008-gpio
3332
- qcom,pm8018-gpio
3433
- qcom,pm8019-gpio
3534
- qcom,pm8038-gpio
@@ -126,7 +125,6 @@ allOf:
126125
compatible:
127126
contains:
128127
enum:
129-
- qcom,pm8008-gpio
130128
- qcom,pmi8950-gpio
131129
- qcom,pmr735d-gpio
132130
then:
@@ -448,7 +446,6 @@ $defs:
448446
- gpio1-gpio10 for pm7325
449447
- gpio1-gpio8 for pm7550ba
450448
- gpio1-gpio4 for pm8005
451-
- gpio1-gpio2 for pm8008
452449
- gpio1-gpio6 for pm8018
453450
- gpio1-gpio12 for pm8038
454451
- gpio1-gpio40 for pm8058

‎drivers/pinctrl/bcm/pinctrl-bcm2835.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -245,7 +245,7 @@ static const char * const irq_type_names[] = {
245245
};
246246

247247
static bool persist_gpio_outputs;
248-
module_param(persist_gpio_outputs, bool, 0644);
248+
module_param(persist_gpio_outputs, bool, 0444);
249249
MODULE_PARM_DESC(persist_gpio_outputs, "Enable GPIO_OUT persistence when pin is freed");
250250

251251
static inline u32 bcm2835_gpio_rd(struct bcm2835_pinctrl *pc, unsigned reg)

‎drivers/pinctrl/core.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1106,8 +1106,8 @@ static struct pinctrl *create_pinctrl(struct device *dev,
11061106
* an -EPROBE_DEFER later, as that is the worst case.
11071107
*/
11081108
if (ret == -EPROBE_DEFER) {
1109-
pinctrl_free(p, false);
11101109
mutex_unlock(&pinctrl_maps_mutex);
1110+
pinctrl_free(p, false);
11111111
return ERR_PTR(ret);
11121112
}
11131113
}

‎drivers/pinctrl/pinctrl-rockchip.c

Lines changed: 59 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -634,23 +634,68 @@ static struct rockchip_mux_recalced_data rk3308_mux_recalced_data[] = {
634634

635635
static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = {
636636
{
637-
.num = 2,
638-
.pin = 12,
639-
.reg = 0x24,
640-
.bit = 8,
641-
.mask = 0x3
642-
}, {
637+
/* gpio2_b7_sel */
643638
.num = 2,
644639
.pin = 15,
645640
.reg = 0x28,
646641
.bit = 0,
647642
.mask = 0x7
648643
}, {
644+
/* gpio2_c7_sel */
649645
.num = 2,
650646
.pin = 23,
651647
.reg = 0x30,
652648
.bit = 14,
653649
.mask = 0x3
650+
}, {
651+
/* gpio3_b1_sel */
652+
.num = 3,
653+
.pin = 9,
654+
.reg = 0x44,
655+
.bit = 2,
656+
.mask = 0x3
657+
}, {
658+
/* gpio3_b2_sel */
659+
.num = 3,
660+
.pin = 10,
661+
.reg = 0x44,
662+
.bit = 4,
663+
.mask = 0x3
664+
}, {
665+
/* gpio3_b3_sel */
666+
.num = 3,
667+
.pin = 11,
668+
.reg = 0x44,
669+
.bit = 6,
670+
.mask = 0x3
671+
}, {
672+
/* gpio3_b4_sel */
673+
.num = 3,
674+
.pin = 12,
675+
.reg = 0x44,
676+
.bit = 8,
677+
.mask = 0x3
678+
}, {
679+
/* gpio3_b5_sel */
680+
.num = 3,
681+
.pin = 13,
682+
.reg = 0x44,
683+
.bit = 10,
684+
.mask = 0x3
685+
}, {
686+
/* gpio3_b6_sel */
687+
.num = 3,
688+
.pin = 14,
689+
.reg = 0x44,
690+
.bit = 12,
691+
.mask = 0x3
692+
}, {
693+
/* gpio3_b7_sel */
694+
.num = 3,
695+
.pin = 15,
696+
.reg = 0x44,
697+
.bit = 14,
698+
.mask = 0x3
654699
},
655700
};
656701

@@ -2433,6 +2478,7 @@ static int rockchip_get_pull(struct rockchip_pin_bank *bank, int pin_num)
24332478
case RK3188:
24342479
case RK3288:
24352480
case RK3308:
2481+
case RK3328:
24362482
case RK3368:
24372483
case RK3399:
24382484
case RK3568:
@@ -2491,6 +2537,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
24912537
case RK3188:
24922538
case RK3288:
24932539
case RK3308:
2540+
case RK3328:
24942541
case RK3368:
24952542
case RK3399:
24962543
case RK3568:
@@ -2704,8 +2751,10 @@ static int rockchip_pmx_set(struct pinctrl_dev *pctldev, unsigned selector,
27042751

27052752
if (ret) {
27062753
/* revert the already done pin settings */
2707-
for (cnt--; cnt >= 0; cnt--)
2754+
for (cnt--; cnt >= 0; cnt--) {
2755+
bank = pin_to_bank(info, pins[cnt]);
27082756
rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0);
2757+
}
27092758

27102759
return ret;
27112760
}
@@ -2753,6 +2802,7 @@ static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
27532802
case RK3188:
27542803
case RK3288:
27552804
case RK3308:
2805+
case RK3328:
27562806
case RK3368:
27572807
case RK3399:
27582808
case RK3568:
@@ -3763,7 +3813,7 @@ static struct rockchip_pin_bank rk3328_pin_banks[] = {
37633813
PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0),
37643814
PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
37653815
PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0,
3766-
IOMUX_WIDTH_3BIT,
3816+
0,
37673817
IOMUX_WIDTH_3BIT,
37683818
0),
37693819
PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3",
@@ -3777,7 +3827,7 @@ static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
37773827
.pin_banks = rk3328_pin_banks,
37783828
.nr_banks = ARRAY_SIZE(rk3328_pin_banks),
37793829
.label = "RK3328-GPIO",
3780-
.type = RK3288,
3830+
.type = RK3328,
37813831
.grf_mux_offset = 0x0,
37823832
.iomux_recalced = rk3328_mux_recalced_data,
37833833
.niomux_recalced = ARRAY_SIZE(rk3328_mux_recalced_data),

‎drivers/pinctrl/pinctrl-rockchip.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -193,6 +193,7 @@ enum rockchip_pinctrl_type {
193193
RK3188,
194194
RK3288,
195195
RK3308,
196+
RK3328,
196197
RK3368,
197198
RK3399,
198199
RK3568,

‎drivers/pinctrl/pinctrl-tps6594.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -486,6 +486,7 @@ static int tps6594_pinctrl_probe(struct platform_device *pdev)
486486
break;
487487
case TPS6593:
488488
case TPS6594:
489+
case LP8764:
489490
pctrl_desc->pins = tps6594_pins;
490491
pctrl_desc->npins = ARRAY_SIZE(tps6594_pins);
491492

‎drivers/pinctrl/qcom/pinctrl-spmi-gpio.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1207,7 +1207,6 @@ static const struct of_device_id pmic_gpio_of_match[] = {
12071207
{ .compatible = "qcom,pm7325-gpio", .data = (void *) 10 },
12081208
{ .compatible = "qcom,pm7550ba-gpio", .data = (void *) 8},
12091209
{ .compatible = "qcom,pm8005-gpio", .data = (void *) 4 },
1210-
{ .compatible = "qcom,pm8008-gpio", .data = (void *) 2 },
12111210
{ .compatible = "qcom,pm8019-gpio", .data = (void *) 6 },
12121211
/* pm8150 has 10 GPIOs with holes on 2, 5, 7 and 8 */
12131212
{ .compatible = "qcom,pm8150-gpio", .data = (void *) 10 },

‎drivers/pinctrl/renesas/pinctrl-rzg2l.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2071,11 +2071,11 @@ static void rzg2l_gpio_irq_restore(struct rzg2l_pinctrl *pctrl)
20712071
* This has to be atomically executed to protect against a concurrent
20722072
* interrupt.
20732073
*/
2074-
raw_spin_lock_irqsave(&pctrl->lock.rlock, flags);
2074+
spin_lock_irqsave(&pctrl->lock, flags);
20752075
ret = rzg2l_gpio_irq_set_type(data, irqd_get_trigger_type(data));
20762076
if (!ret && !irqd_irq_disabled(data))
20772077
rzg2l_gpio_irq_enable(data);
2078-
raw_spin_unlock_irqrestore(&pctrl->lock.rlock, flags);
2078+
spin_unlock_irqrestore(&pctrl->lock, flags);
20792079

20802080
if (ret)
20812081
dev_crit(pctrl->dev, "Failed to set IRQ type for virq=%u\n", virq);

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