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Anshuman Khandualwilldeacon
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arm64/mm: Directly use ID_AA64MMFR2_EL1_VARange_MASK
Tools generated register fields have in place mask macros which can be used directly instead of shifting the older right end sided masks. Cc: Catalin Marinas <[email protected]> Cc: Will Deacon <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Anshuman Khandual <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
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arch/arm64/kernel/head.S

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -113,7 +113,7 @@ SYM_CODE_START(primary_entry)
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*/
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#if VA_BITS > 48
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mrs_s x0, SYS_ID_AA64MMFR2_EL1
116-
tst x0, #0xf << ID_AA64MMFR2_EL1_VARange_SHIFT
116+
tst x0, ID_AA64MMFR2_EL1_VARange_MASK
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mov x0, #VA_BITS
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mov x25, #VA_BITS_MIN
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csel x25, x25, x0, eq
@@ -756,7 +756,7 @@ SYM_FUNC_START(__cpu_secondary_check52bitva)
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b.ne 2f
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mrs_s x0, SYS_ID_AA64MMFR2_EL1
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and x0, x0, #(0xf << ID_AA64MMFR2_EL1_VARange_SHIFT)
759+
and x0, x0, ID_AA64MMFR2_EL1_VARange_MASK
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cbnz x0, 2f
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update_early_cpu_boot_status \

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