@@ -116,11 +116,13 @@ void finalize_vcpu(struct kvm_vcpu *vcpu, struct vcpu_reg_list *c)
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}
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}
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- static const char * config_id_to_str (__u64 id )
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+ static const char * config_id_to_str (const char * prefix , __u64 id )
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{
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/* reg_off is the offset into struct kvm_riscv_config */
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__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_CONFIG );
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+ assert ((id & KVM_REG_RISCV_TYPE_MASK ) == KVM_REG_RISCV_CONFIG );
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+
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switch (reg_off ) {
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case KVM_REG_RISCV_CONFIG_REG (isa ):
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return "KVM_REG_RISCV_CONFIG_REG(isa)" ;
@@ -138,18 +140,16 @@ static const char *config_id_to_str(__u64 id)
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return "KVM_REG_RISCV_CONFIG_REG(satp_mode)" ;
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}
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- /*
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- * Config regs would grow regularly with new pseudo reg added, so
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- * just show raw id to indicate a new pseudo config reg.
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- */
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- return strdup_printf ("KVM_REG_RISCV_CONFIG_REG(%lld) /* UNKNOWN */" , reg_off );
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+ return strdup_printf ("%lld /* UNKNOWN */" , reg_off );
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}
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static const char * core_id_to_str (const char * prefix , __u64 id )
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{
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/* reg_off is the offset into struct kvm_riscv_core */
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__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_CORE );
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+ assert ((id & KVM_REG_RISCV_TYPE_MASK ) == KVM_REG_RISCV_CORE );
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+
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switch (reg_off ) {
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case KVM_REG_RISCV_CORE_REG (regs .pc ):
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return "KVM_REG_RISCV_CORE_REG(regs.pc)" ;
@@ -180,8 +180,7 @@ static const char *core_id_to_str(const char *prefix, __u64 id)
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return "KVM_REG_RISCV_CORE_REG(mode)" ;
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}
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- TEST_FAIL ("%s: Unknown core reg id: 0x%llx" , prefix , id );
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- return NULL ;
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+ return strdup_printf ("%lld /* UNKNOWN */" , reg_off );
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}
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#define RISCV_CSR_GENERAL (csr ) \
@@ -219,8 +218,7 @@ static const char *general_csr_id_to_str(__u64 reg_off)
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return RISCV_CSR_GENERAL (senvcfg );
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}
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- TEST_FAIL ("Unknown general csr reg: 0x%llx" , reg_off );
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- return NULL ;
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+ return strdup_printf ("KVM_REG_RISCV_CSR_GENERAL | %lld /* UNKNOWN */" , reg_off );
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}
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static const char * aia_csr_id_to_str (__u64 reg_off )
@@ -243,8 +241,7 @@ static const char *aia_csr_id_to_str(__u64 reg_off)
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return RISCV_CSR_AIA (iprio2h );
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}
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- TEST_FAIL ("Unknown aia csr reg: 0x%llx" , reg_off );
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- return NULL ;
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+ return strdup_printf ("KVM_REG_RISCV_CSR_AIA | %lld /* UNKNOWN */" , reg_off );
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}
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static const char * smstateen_csr_id_to_str (__u64 reg_off )
@@ -264,6 +261,8 @@ static const char *csr_id_to_str(const char *prefix, __u64 id)
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__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_CSR );
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__u64 reg_subtype = reg_off & KVM_REG_RISCV_SUBTYPE_MASK ;
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+ assert ((id & KVM_REG_RISCV_TYPE_MASK ) == KVM_REG_RISCV_CSR );
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+
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reg_off &= ~KVM_REG_RISCV_SUBTYPE_MASK ;
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switch (reg_subtype ) {
@@ -275,15 +274,16 @@ static const char *csr_id_to_str(const char *prefix, __u64 id)
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return smstateen_csr_id_to_str (reg_off );
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}
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- TEST_FAIL ("%s: Unknown csr subtype: 0x%llx" , prefix , reg_subtype );
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- return NULL ;
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+ return strdup_printf ("%lld | %lld /* UNKNOWN */" , reg_subtype , reg_off );
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}
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static const char * timer_id_to_str (const char * prefix , __u64 id )
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{
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/* reg_off is the offset into struct kvm_riscv_timer */
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__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_TIMER );
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+ assert ((id & KVM_REG_RISCV_TYPE_MASK ) == KVM_REG_RISCV_TIMER );
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+
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switch (reg_off ) {
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case KVM_REG_RISCV_TIMER_REG (frequency ):
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return "KVM_REG_RISCV_TIMER_REG(frequency)" ;
@@ -295,15 +295,16 @@ static const char *timer_id_to_str(const char *prefix, __u64 id)
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return "KVM_REG_RISCV_TIMER_REG(state)" ;
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}
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- TEST_FAIL ("%s: Unknown timer reg id: 0x%llx" , prefix , id );
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- return NULL ;
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+ return strdup_printf ("%lld /* UNKNOWN */" , reg_off );
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}
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static const char * fp_f_id_to_str (const char * prefix , __u64 id )
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{
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/* reg_off is the offset into struct __riscv_f_ext_state */
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__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_FP_F );
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+ assert ((id & KVM_REG_RISCV_TYPE_MASK ) == KVM_REG_RISCV_FP_F );
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+
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switch (reg_off ) {
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case KVM_REG_RISCV_FP_F_REG (f [0 ]) ...
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KVM_REG_RISCV_FP_F_REG (f [31 ]):
@@ -312,15 +313,16 @@ static const char *fp_f_id_to_str(const char *prefix, __u64 id)
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return "KVM_REG_RISCV_FP_F_REG(fcsr)" ;
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}
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- TEST_FAIL ("%s: Unknown fp_f reg id: 0x%llx" , prefix , id );
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- return NULL ;
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+ return strdup_printf ("%lld /* UNKNOWN */" , reg_off );
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}
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static const char * fp_d_id_to_str (const char * prefix , __u64 id )
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{
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/* reg_off is the offset into struct __riscv_d_ext_state */
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__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_FP_D );
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+ assert ((id & KVM_REG_RISCV_TYPE_MASK ) == KVM_REG_RISCV_FP_D );
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+
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switch (reg_off ) {
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case KVM_REG_RISCV_FP_D_REG (f [0 ]) ...
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KVM_REG_RISCV_FP_D_REG (f [31 ]):
@@ -329,18 +331,19 @@ static const char *fp_d_id_to_str(const char *prefix, __u64 id)
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return "KVM_REG_RISCV_FP_D_REG(fcsr)" ;
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}
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- TEST_FAIL ("%s: Unknown fp_d reg id: 0x%llx" , prefix , id );
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- return NULL ;
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+ return strdup_printf ("%lld /* UNKNOWN */" , reg_off );
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}
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#define KVM_ISA_EXT_ARR (ext ) \
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[KVM_RISCV_ISA_EXT_##ext] = "KVM_RISCV_ISA_EXT_" #ext
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- static const char * isa_ext_id_to_str (__u64 id )
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+ static const char * isa_ext_id_to_str (const char * prefix , __u64 id )
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{
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/* reg_off is the offset into unsigned long kvm_isa_ext_arr[] */
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__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_ISA_EXT );
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+ assert ((id & KVM_REG_RISCV_TYPE_MASK ) == KVM_REG_RISCV_ISA_EXT );
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+
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static const char * const kvm_isa_ext_reg_name [] = {
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KVM_ISA_EXT_ARR (A ),
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KVM_ISA_EXT_ARR (C ),
@@ -369,13 +372,8 @@ static const char *isa_ext_id_to_str(__u64 id)
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KVM_ISA_EXT_ARR (ZIHPM ),
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};
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- if (reg_off >= ARRAY_SIZE (kvm_isa_ext_reg_name )) {
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- /*
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- * isa_ext regs would grow regularly with new isa extension added, so
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- * just show "reg" to indicate a new extension.
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- */
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+ if (reg_off >= ARRAY_SIZE (kvm_isa_ext_reg_name ))
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return strdup_printf ("%lld /* UNKNOWN */" , reg_off );
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- }
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return kvm_isa_ext_reg_name [reg_off ];
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}
@@ -398,42 +396,36 @@ static const char *sbi_ext_single_id_to_str(__u64 reg_off)
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KVM_SBI_EXT_ARR (KVM_RISCV_SBI_EXT_VENDOR ),
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};
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- if (reg_off >= ARRAY_SIZE (kvm_sbi_ext_reg_name )) {
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- /*
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- * sbi_ext regs would grow regularly with new sbi extension added, so
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- * just show "reg" to indicate a new extension.
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- */
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+ if (reg_off >= ARRAY_SIZE (kvm_sbi_ext_reg_name ))
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return strdup_printf ("KVM_REG_RISCV_SBI_SINGLE | %lld /* UNKNOWN */" , reg_off );
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- }
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return kvm_sbi_ext_reg_name [reg_off ];
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}
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static const char * sbi_ext_multi_id_to_str (__u64 reg_subtype , __u64 reg_off )
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{
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- if (reg_off > KVM_REG_RISCV_SBI_MULTI_REG_LAST ) {
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- /*
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- * sbi_ext regs would grow regularly with new sbi extension added, so
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- * just show "reg" to indicate a new extension.
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- */
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- return strdup_printf ("%lld /* UNKNOWN */" , reg_off );
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- }
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+ const char * unknown = "" ;
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+
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+ if (reg_off > KVM_REG_RISCV_SBI_MULTI_REG_LAST )
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+ unknown = " /* UNKNOWN */" ;
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switch (reg_subtype ) {
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case KVM_REG_RISCV_SBI_MULTI_EN :
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- return strdup_printf ("KVM_REG_RISCV_SBI_MULTI_EN | %lld" , reg_off );
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+ return strdup_printf ("KVM_REG_RISCV_SBI_MULTI_EN | %lld%s " , reg_off , unknown );
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case KVM_REG_RISCV_SBI_MULTI_DIS :
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- return strdup_printf ("KVM_REG_RISCV_SBI_MULTI_DIS | %lld" , reg_off );
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+ return strdup_printf ("KVM_REG_RISCV_SBI_MULTI_DIS | %lld%s " , reg_off , unknown );
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}
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- return NULL ;
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+ return strdup_printf ( "%lld | %lld /* UNKNOWN */" , reg_subtype , reg_off ) ;
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}
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static const char * sbi_ext_id_to_str (const char * prefix , __u64 id )
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{
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__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_SBI_EXT );
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__u64 reg_subtype = reg_off & KVM_REG_RISCV_SUBTYPE_MASK ;
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+ assert ((id & KVM_REG_RISCV_TYPE_MASK ) == KVM_REG_RISCV_SBI_EXT );
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+
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reg_off &= ~KVM_REG_RISCV_SUBTYPE_MASK ;
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switch (reg_subtype ) {
@@ -444,8 +436,7 @@ static const char *sbi_ext_id_to_str(const char *prefix, __u64 id)
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return sbi_ext_multi_id_to_str (reg_subtype , reg_off );
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}
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- TEST_FAIL ("%s: Unknown sbi ext subtype: 0x%llx" , prefix , reg_subtype );
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- return NULL ;
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+ return strdup_printf ("%lld | %lld /* UNKNOWN */" , reg_subtype , reg_off );
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}
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void print_reg (const char * prefix , __u64 id )
@@ -466,14 +457,14 @@ void print_reg(const char *prefix, __u64 id)
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reg_size = "KVM_REG_SIZE_U128" ;
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break ;
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default :
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- TEST_FAIL ( "%s: Unexpected reg size: 0x%llx in reg id: 0x%llx " ,
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- prefix , (id & KVM_REG_SIZE_MASK ) >> KVM_REG_SIZE_SHIFT , id );
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+ printf ( "\tKVM_REG_RISCV | (%lld << KVM_REG_SIZE_SHIFT) | 0x%llx /* UNKNOWN */, " ,
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+ (id & KVM_REG_SIZE_MASK ) >> KVM_REG_SIZE_SHIFT , id & REG_MASK );
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}
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switch (id & KVM_REG_RISCV_TYPE_MASK ) {
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case KVM_REG_RISCV_CONFIG :
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printf ("\tKVM_REG_RISCV | %s | KVM_REG_RISCV_CONFIG | %s,\n" ,
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- reg_size , config_id_to_str (id ));
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+ reg_size , config_id_to_str (prefix , id ));
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break ;
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case KVM_REG_RISCV_CORE :
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printf ("\tKVM_REG_RISCV | %s | KVM_REG_RISCV_CORE | %s,\n" ,
@@ -497,15 +488,15 @@ void print_reg(const char *prefix, __u64 id)
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break ;
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case KVM_REG_RISCV_ISA_EXT :
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printf ("\tKVM_REG_RISCV | %s | KVM_REG_RISCV_ISA_EXT | %s,\n" ,
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- reg_size , isa_ext_id_to_str (id ));
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+ reg_size , isa_ext_id_to_str (prefix , id ));
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break ;
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case KVM_REG_RISCV_SBI_EXT :
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printf ("\tKVM_REG_RISCV | %s | KVM_REG_RISCV_SBI_EXT | %s,\n" ,
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reg_size , sbi_ext_id_to_str (prefix , id ));
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break ;
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default :
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- TEST_FAIL ( "%s: Unexpected reg type: 0x%llx in reg id: 0x%llx" , prefix ,
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- ( id & KVM_REG_RISCV_TYPE_MASK ) >> KVM_REG_RISCV_TYPE_SHIFT , id );
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+ printf ( "\tKVM_REG_RISCV | %s | 0x%llx /* UNKNOWN */," ,
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+ reg_size , id & REG_MASK );
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}
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}
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