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jones-drewavpatel
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RISC-V: KVM: Improve vector save/restore functions
Make two nonfunctional changes to the vector get/set vector reg functions and their supporting function for simplification and readability. The first is to not pass KVM_REG_RISCV_VECTOR, but rather integrate it directly into the masking. The second is to rename reg_val to reg_addr where and address is used instead of a value. Also opportunistically touch up some of the code formatting for a third nonfunctional change. Signed-off-by: Andrew Jones <[email protected]> Reviewed-by: Daniel Henrique Barboza <[email protected]> Signed-off-by: Anup Patel <[email protected]>
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3 files changed

+23
-35
lines changed

3 files changed

+23
-35
lines changed

arch/riscv/include/asm/kvm_vcpu_vector.h

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -74,9 +74,7 @@ static inline void kvm_riscv_vcpu_free_vector_context(struct kvm_vcpu *vcpu)
7474
#endif
7575

7676
int kvm_riscv_vcpu_get_reg_vector(struct kvm_vcpu *vcpu,
77-
const struct kvm_one_reg *reg,
78-
unsigned long rtype);
77+
const struct kvm_one_reg *reg);
7978
int kvm_riscv_vcpu_set_reg_vector(struct kvm_vcpu *vcpu,
80-
const struct kvm_one_reg *reg,
81-
unsigned long rtype);
79+
const struct kvm_one_reg *reg);
8280
#endif

arch/riscv/kvm/vcpu_onereg.c

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -645,8 +645,7 @@ int kvm_riscv_vcpu_set_reg(struct kvm_vcpu *vcpu,
645645
case KVM_REG_RISCV_SBI_EXT:
646646
return kvm_riscv_vcpu_set_reg_sbi_ext(vcpu, reg);
647647
case KVM_REG_RISCV_VECTOR:
648-
return kvm_riscv_vcpu_set_reg_vector(vcpu, reg,
649-
KVM_REG_RISCV_VECTOR);
648+
return kvm_riscv_vcpu_set_reg_vector(vcpu, reg);
650649
default:
651650
break;
652651
}
@@ -677,8 +676,7 @@ int kvm_riscv_vcpu_get_reg(struct kvm_vcpu *vcpu,
677676
case KVM_REG_RISCV_SBI_EXT:
678677
return kvm_riscv_vcpu_get_reg_sbi_ext(vcpu, reg);
679678
case KVM_REG_RISCV_VECTOR:
680-
return kvm_riscv_vcpu_get_reg_vector(vcpu, reg,
681-
KVM_REG_RISCV_VECTOR);
679+
return kvm_riscv_vcpu_get_reg_vector(vcpu, reg);
682680
default:
683681
break;
684682
}

arch/riscv/kvm/vcpu_vector.c

Lines changed: 19 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -92,9 +92,9 @@ void kvm_riscv_vcpu_free_vector_context(struct kvm_vcpu *vcpu)
9292
#endif
9393

9494
static int kvm_riscv_vcpu_vreg_addr(struct kvm_vcpu *vcpu,
95-
unsigned long reg_num,
96-
size_t reg_size,
97-
void **reg_val)
95+
unsigned long reg_num,
96+
size_t reg_size,
97+
void **reg_addr)
9898
{
9999
struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;
100100
size_t vlenb = riscv_v_vsize / 32;
@@ -104,16 +104,16 @@ static int kvm_riscv_vcpu_vreg_addr(struct kvm_vcpu *vcpu,
104104
return -EINVAL;
105105
switch (reg_num) {
106106
case KVM_REG_RISCV_VECTOR_CSR_REG(vstart):
107-
*reg_val = &cntx->vector.vstart;
107+
*reg_addr = &cntx->vector.vstart;
108108
break;
109109
case KVM_REG_RISCV_VECTOR_CSR_REG(vl):
110-
*reg_val = &cntx->vector.vl;
110+
*reg_addr = &cntx->vector.vl;
111111
break;
112112
case KVM_REG_RISCV_VECTOR_CSR_REG(vtype):
113-
*reg_val = &cntx->vector.vtype;
113+
*reg_addr = &cntx->vector.vtype;
114114
break;
115115
case KVM_REG_RISCV_VECTOR_CSR_REG(vcsr):
116-
*reg_val = &cntx->vector.vcsr;
116+
*reg_addr = &cntx->vector.vcsr;
117117
break;
118118
case KVM_REG_RISCV_VECTOR_CSR_REG(datap):
119119
default:
@@ -122,8 +122,8 @@ static int kvm_riscv_vcpu_vreg_addr(struct kvm_vcpu *vcpu,
122122
} else if (reg_num <= KVM_REG_RISCV_VECTOR_REG(31)) {
123123
if (reg_size != vlenb)
124124
return -EINVAL;
125-
*reg_val = cntx->vector.datap
126-
+ (reg_num - KVM_REG_RISCV_VECTOR_REG(0)) * vlenb;
125+
*reg_addr = cntx->vector.datap +
126+
(reg_num - KVM_REG_RISCV_VECTOR_REG(0)) * vlenb;
127127
} else {
128128
return -ENOENT;
129129
}
@@ -132,60 +132,52 @@ static int kvm_riscv_vcpu_vreg_addr(struct kvm_vcpu *vcpu,
132132
}
133133

134134
int kvm_riscv_vcpu_get_reg_vector(struct kvm_vcpu *vcpu,
135-
const struct kvm_one_reg *reg,
136-
unsigned long rtype)
135+
const struct kvm_one_reg *reg)
137136
{
138137
unsigned long *isa = vcpu->arch.isa;
139138
unsigned long __user *uaddr =
140139
(unsigned long __user *)(unsigned long)reg->addr;
141140
unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
142141
KVM_REG_SIZE_MASK |
143-
rtype);
142+
KVM_REG_RISCV_VECTOR);
144143
size_t reg_size = KVM_REG_SIZE(reg->id);
145-
void *reg_val;
144+
void *reg_addr;
146145
int rc;
147146

148-
if (rtype != KVM_REG_RISCV_VECTOR)
149-
return -EINVAL;
150-
151147
if (!riscv_isa_extension_available(isa, v))
152148
return -ENOENT;
153149

154-
rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, &reg_val);
150+
rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, &reg_addr);
155151
if (rc)
156152
return rc;
157153

158-
if (copy_to_user(uaddr, reg_val, reg_size))
154+
if (copy_to_user(uaddr, reg_addr, reg_size))
159155
return -EFAULT;
160156

161157
return 0;
162158
}
163159

164160
int kvm_riscv_vcpu_set_reg_vector(struct kvm_vcpu *vcpu,
165-
const struct kvm_one_reg *reg,
166-
unsigned long rtype)
161+
const struct kvm_one_reg *reg)
167162
{
168163
unsigned long *isa = vcpu->arch.isa;
169164
unsigned long __user *uaddr =
170165
(unsigned long __user *)(unsigned long)reg->addr;
171166
unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
172167
KVM_REG_SIZE_MASK |
173-
rtype);
168+
KVM_REG_RISCV_VECTOR);
174169
size_t reg_size = KVM_REG_SIZE(reg->id);
175-
void *reg_val;
170+
void *reg_addr;
176171
int rc;
177172

178-
if (rtype != KVM_REG_RISCV_VECTOR)
179-
return -EINVAL;
180-
181173
if (!riscv_isa_extension_available(isa, v))
182174
return -ENOENT;
183175

184-
rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, &reg_val);
176+
rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, &reg_addr);
185177
if (rc)
186178
return rc;
187179

188-
if (copy_from_user(reg_val, uaddr, reg_size))
180+
if (copy_from_user(reg_addr, uaddr, reg_size))
189181
return -EFAULT;
190182

191183
return 0;

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