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bebarinobebarino
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Merge tag 'sunxi-clk-for-6.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner
Pull Allwinner clk driver updates from Jernej Skrabec: - add D1 CAN bus gates and resets - mark D1 CPUX clock as critical - reuse D1 driver for R528/T113 - cleanup sunxi-ng kconfig - fix sunxi-ng kernel-doc issues - model H3/H5 DRAM clock as fixed clock * tag 'sunxi-clk-for-6.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: d1: Add CAN bus gates and resets dt-bindings: clock: Add D1 CAN bus gates and resets clk: sunxi-ng: d1: Mark cpux clock as critical clk: sunxi-ng: d1: Allow building for R528/T113 clk: sunxi-ng: Move SoC driver conditions to dependencies clk: sunxi-ng: Remove duplicate ARCH_SUNXI dependencies clk: sunxi-ng: Avoid computing the rate twice clk: sunxi-ng: h3/h5: Model H3 CLK_DRAM as a fixed clock clk: sunxi-ng: fix ccu_mmc_timing.c kernel-doc issues
2 parents 1b929c0 + e6f2ffe commit 633ff55

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12 files changed

+93
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‎drivers/clk/sunxi-ng/Kconfig

Lines changed: 36 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -9,112 +9,113 @@ if SUNXI_CCU
99

1010
config SUNIV_F1C100S_CCU
1111
tristate "Support for the Allwinner newer F1C100s CCU"
12-
default MACH_SUNIV
12+
default y
1313
depends on MACH_SUNIV || COMPILE_TEST
1414

1515
config SUN20I_D1_CCU
16-
tristate "Support for the Allwinner D1 CCU"
17-
default RISCV && ARCH_SUNXI
18-
depends on (RISCV && ARCH_SUNXI) || COMPILE_TEST
16+
tristate "Support for the Allwinner D1/R528/T113 CCU"
17+
default y
18+
depends on MACH_SUN8I || RISCV || COMPILE_TEST
1919

2020
config SUN20I_D1_R_CCU
21-
tristate "Support for the Allwinner D1 PRCM CCU"
22-
default RISCV && ARCH_SUNXI
23-
depends on (RISCV && ARCH_SUNXI) || COMPILE_TEST
21+
tristate "Support for the Allwinner D1/R528/T113 PRCM CCU"
22+
default y
23+
depends on MACH_SUN8I || RISCV || COMPILE_TEST
2424

2525
config SUN50I_A64_CCU
2626
tristate "Support for the Allwinner A64 CCU"
27-
default ARM64 && ARCH_SUNXI
28-
depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
27+
default y
28+
depends on ARM64 || COMPILE_TEST
2929

3030
config SUN50I_A100_CCU
3131
tristate "Support for the Allwinner A100 CCU"
32-
default ARM64 && ARCH_SUNXI
33-
depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
32+
default y
33+
depends on ARM64 || COMPILE_TEST
3434

3535
config SUN50I_A100_R_CCU
3636
tristate "Support for the Allwinner A100 PRCM CCU"
37-
default ARM64 && ARCH_SUNXI
38-
depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
37+
default y
38+
depends on ARM64 || COMPILE_TEST
3939

4040
config SUN50I_H6_CCU
4141
tristate "Support for the Allwinner H6 CCU"
42-
default ARM64 && ARCH_SUNXI
43-
depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
42+
default y
43+
depends on ARM64 || COMPILE_TEST
4444

4545
config SUN50I_H616_CCU
4646
tristate "Support for the Allwinner H616 CCU"
47-
default ARM64 && ARCH_SUNXI
48-
depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
47+
default y
48+
depends on ARM64 || COMPILE_TEST
4949

5050
config SUN50I_H6_R_CCU
5151
tristate "Support for the Allwinner H6 and H616 PRCM CCU"
52-
default ARM64 && ARCH_SUNXI
53-
depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
52+
default y
53+
depends on ARM64 || COMPILE_TEST
5454

5555
config SUN4I_A10_CCU
5656
tristate "Support for the Allwinner A10/A20 CCU"
57-
default MACH_SUN4I
58-
default MACH_SUN7I
57+
default y
5958
depends on MACH_SUN4I || MACH_SUN7I || COMPILE_TEST
6059

6160
config SUN5I_CCU
6261
bool "Support for the Allwinner sun5i family CCM"
63-
default MACH_SUN5I
62+
default y
6463
depends on MACH_SUN5I || COMPILE_TEST
6564
depends on SUNXI_CCU=y
6665

6766
config SUN6I_A31_CCU
6867
tristate "Support for the Allwinner A31/A31s CCU"
69-
default MACH_SUN6I
68+
default y
7069
depends on MACH_SUN6I || COMPILE_TEST
7170

7271
config SUN6I_RTC_CCU
7372
tristate "Support for the Allwinner H616/R329 RTC CCU"
74-
default ARCH_SUNXI
75-
depends on ARCH_SUNXI || COMPILE_TEST
73+
default y
74+
depends on MACH_SUN8I || ARM64 || RISCV || COMPILE_TEST
7675

7776
config SUN8I_A23_CCU
7877
tristate "Support for the Allwinner A23 CCU"
79-
default MACH_SUN8I
78+
default y
8079
depends on MACH_SUN8I || COMPILE_TEST
8180

8281
config SUN8I_A33_CCU
8382
tristate "Support for the Allwinner A33 CCU"
84-
default MACH_SUN8I
83+
default y
8584
depends on MACH_SUN8I || COMPILE_TEST
8685

8786
config SUN8I_A83T_CCU
8887
tristate "Support for the Allwinner A83T CCU"
89-
default MACH_SUN8I
88+
default y
9089
depends on MACH_SUN8I || COMPILE_TEST
9190

9291
config SUN8I_H3_CCU
9392
tristate "Support for the Allwinner H3 CCU"
94-
default MACH_SUN8I || (ARM64 && ARCH_SUNXI)
95-
depends on MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
93+
default y
94+
depends on MACH_SUN8I || ARM64 || COMPILE_TEST
9695

9796
config SUN8I_V3S_CCU
9897
tristate "Support for the Allwinner V3s CCU"
99-
default MACH_SUN8I
98+
default y
10099
depends on MACH_SUN8I || COMPILE_TEST
101100

102101
config SUN8I_DE2_CCU
103102
tristate "Support for the Allwinner SoCs DE2 CCU"
104-
default MACH_SUN8I || (ARM64 && ARCH_SUNXI)
103+
default y
104+
depends on MACH_SUN8I || ARM64 || RISCV || COMPILE_TEST
105105

106106
config SUN8I_R40_CCU
107107
tristate "Support for the Allwinner R40 CCU"
108-
default MACH_SUN8I
108+
default y
109109
depends on MACH_SUN8I || COMPILE_TEST
110110

111111
config SUN9I_A80_CCU
112112
tristate "Support for the Allwinner A80 CCU"
113-
default MACH_SUN9I
113+
default y
114114
depends on MACH_SUN9I || COMPILE_TEST
115115

116116
config SUN8I_R_CCU
117117
tristate "Support for Allwinner SoCs' PRCM CCUs"
118-
default MACH_SUN8I || (ARCH_SUNXI && ARM64)
118+
default y
119+
depends on MACH_SUN8I || ARM64 || COMPILE_TEST
119120

120121
endif

‎drivers/clk/sunxi-ng/ccu-sun20i-d1.c

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -240,7 +240,7 @@ static const struct clk_parent_data cpux_parents[] = {
240240
{ .hw = &pll_periph0_800M_clk.common.hw },
241241
};
242242
static SUNXI_CCU_MUX_DATA(cpux_clk, "cpux", cpux_parents,
243-
0x500, 24, 3, CLK_SET_RATE_PARENT);
243+
0x500, 24, 3, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL);
244244

245245
static const struct clk_hw *cpux_hws[] = { &cpux_clk.common.hw };
246246
static SUNXI_CCU_M_HWS(cpux_axi_clk, "cpux-axi",
@@ -469,6 +469,11 @@ static SUNXI_CCU_GATE_HWS(bus_i2c2_clk, "bus-i2c2", apb1_hws,
469469
static SUNXI_CCU_GATE_HWS(bus_i2c3_clk, "bus-i2c3", apb1_hws,
470470
0x91c, BIT(3), 0);
471471

472+
static SUNXI_CCU_GATE_HWS(bus_can0_clk, "bus-can0", apb1_hws,
473+
0x92c, BIT(0), 0);
474+
static SUNXI_CCU_GATE_HWS(bus_can1_clk, "bus-can1", apb1_hws,
475+
0x92c, BIT(1), 0);
476+
472477
static const struct clk_parent_data spi_parents[] = {
473478
{ .fw_name = "hosc" },
474479
{ .hw = &pll_periph0_clk.hw },
@@ -997,6 +1002,8 @@ static struct ccu_common *sun20i_d1_ccu_clks[] = {
9971002
&bus_i2c1_clk.common,
9981003
&bus_i2c2_clk.common,
9991004
&bus_i2c3_clk.common,
1005+
&bus_can0_clk.common,
1006+
&bus_can1_clk.common,
10001007
&spi0_clk.common,
10011008
&spi1_clk.common,
10021009
&bus_spi0_clk.common,
@@ -1147,6 +1154,8 @@ static struct clk_hw_onecell_data sun20i_d1_hw_clks = {
11471154
[CLK_BUS_I2C1] = &bus_i2c1_clk.common.hw,
11481155
[CLK_BUS_I2C2] = &bus_i2c2_clk.common.hw,
11491156
[CLK_BUS_I2C3] = &bus_i2c3_clk.common.hw,
1157+
[CLK_BUS_CAN0] = &bus_can0_clk.common.hw,
1158+
[CLK_BUS_CAN1] = &bus_can1_clk.common.hw,
11501159
[CLK_SPI0] = &spi0_clk.common.hw,
11511160
[CLK_SPI1] = &spi1_clk.common.hw,
11521161
[CLK_BUS_SPI0] = &bus_spi0_clk.common.hw,
@@ -1252,6 +1261,8 @@ static struct ccu_reset_map sun20i_d1_ccu_resets[] = {
12521261
[RST_BUS_I2C1] = { 0x91c, BIT(17) },
12531262
[RST_BUS_I2C2] = { 0x91c, BIT(18) },
12541263
[RST_BUS_I2C3] = { 0x91c, BIT(19) },
1264+
[RST_BUS_CAN0] = { 0x92c, BIT(16) },
1265+
[RST_BUS_CAN1] = { 0x92c, BIT(17) },
12551266
[RST_BUS_SPI0] = { 0x96c, BIT(16) },
12561267
[RST_BUS_SPI1] = { 0x96c, BIT(17) },
12571268
[RST_BUS_EMAC] = { 0x97c, BIT(16) },

‎drivers/clk/sunxi-ng/ccu-sun20i-d1.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,6 @@
1010
#include <dt-bindings/clock/sun20i-d1-ccu.h>
1111
#include <dt-bindings/reset/sun20i-d1-ccu.h>
1212

13-
#define CLK_NUMBER (CLK_FANOUT2 + 1)
13+
#define CLK_NUMBER (CLK_BUS_CAN1 + 1)
1414

1515
#endif /* _CCU_SUN20I_D1_H_ */

‎drivers/clk/sunxi-ng/ccu-sun8i-h3.c

Lines changed: 10 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -434,8 +434,13 @@ static SUNXI_CCU_GATE(usb_ohci2_clk, "usb-ohci2", "osc24M",
434434
static SUNXI_CCU_GATE(usb_ohci3_clk, "usb-ohci3", "osc24M",
435435
0x0cc, BIT(19), 0);
436436

437-
static const char * const dram_parents[] = { "pll-ddr", "pll-periph0-2x" };
438-
static SUNXI_CCU_M_WITH_MUX(dram_clk, "dram", dram_parents,
437+
/* H3 has broken MDFS hardware, so the mux/divider cannot be changed. */
438+
static CLK_FIXED_FACTOR_HW(h3_dram_clk, "dram",
439+
&pll_ddr_clk.common.hw,
440+
1, 1, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL);
441+
442+
static const char * const h5_dram_parents[] = { "pll-ddr", "pll-periph0-2x" };
443+
static SUNXI_CCU_M_WITH_MUX(h5_dram_clk, "dram", h5_dram_parents,
439444
0x0f4, 0, 4, 20, 2, CLK_IS_CRITICAL);
440445

441446
static SUNXI_CCU_GATE(dram_ve_clk, "dram-ve", "dram",
@@ -592,7 +597,7 @@ static struct ccu_common *sun8i_h3_ccu_clks[] = {
592597
&usb_ohci1_clk.common,
593598
&usb_ohci2_clk.common,
594599
&usb_ohci3_clk.common,
595-
&dram_clk.common,
600+
&h5_dram_clk.common,
596601
&dram_ve_clk.common,
597602
&dram_csi_clk.common,
598603
&dram_deinterlace_clk.common,
@@ -732,7 +737,7 @@ static struct clk_hw_onecell_data sun8i_h3_hw_clks = {
732737
[CLK_USB_OHCI1] = &usb_ohci1_clk.common.hw,
733738
[CLK_USB_OHCI2] = &usb_ohci2_clk.common.hw,
734739
[CLK_USB_OHCI3] = &usb_ohci3_clk.common.hw,
735-
[CLK_DRAM] = &dram_clk.common.hw,
740+
[CLK_DRAM] = &h3_dram_clk.hw,
736741
[CLK_DRAM_VE] = &dram_ve_clk.common.hw,
737742
[CLK_DRAM_CSI] = &dram_csi_clk.common.hw,
738743
[CLK_DRAM_DEINTERLACE] = &dram_deinterlace_clk.common.hw,
@@ -848,7 +853,7 @@ static struct clk_hw_onecell_data sun50i_h5_hw_clks = {
848853
[CLK_USB_OHCI1] = &usb_ohci1_clk.common.hw,
849854
[CLK_USB_OHCI2] = &usb_ohci2_clk.common.hw,
850855
[CLK_USB_OHCI3] = &usb_ohci3_clk.common.hw,
851-
[CLK_DRAM] = &dram_clk.common.hw,
856+
[CLK_DRAM] = &h5_dram_clk.common.hw,
852857
[CLK_DRAM_VE] = &dram_ve_clk.common.hw,
853858
[CLK_DRAM_CSI] = &dram_csi_clk.common.hw,
854859
[CLK_DRAM_DEINTERLACE] = &dram_deinterlace_clk.common.hw,

‎drivers/clk/sunxi-ng/ccu_mmc_timing.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -10,11 +10,11 @@
1010
#include "ccu_common.h"
1111

1212
/**
13-
* sunxi_ccu_set_mmc_timing_mode: Configure the MMC clock timing mode
13+
* sunxi_ccu_set_mmc_timing_mode - Configure the MMC clock timing mode
1414
* @clk: clock to be configured
1515
* @new_mode: true for new timing mode introduced in A83T and later
1616
*
17-
* Returns 0 on success, -ENOTSUPP if the clock does not support
17+
* Return: %0 on success, %-ENOTSUPP if the clock does not support
1818
* switching modes.
1919
*/
2020
int sunxi_ccu_set_mmc_timing_mode(struct clk *clk, bool new_mode)
@@ -46,8 +46,8 @@ EXPORT_SYMBOL_GPL(sunxi_ccu_set_mmc_timing_mode);
4646
* sunxi_ccu_set_mmc_timing_mode: Get the current MMC clock timing mode
4747
* @clk: clock to query
4848
*
49-
* Returns 0 if the clock is in old timing mode, > 0 if it is in
50-
* new timing mode, and -ENOTSUPP if the clock does not support
49+
* Return: %0 if the clock is in old timing mode, > %0 if it is in
50+
* new timing mode, and %-ENOTSUPP if the clock does not support
5151
* this function.
5252
*/
5353
int sunxi_ccu_get_mmc_timing_mode(struct clk *clk)

‎drivers/clk/sunxi-ng/ccu_mp.c

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -10,9 +10,9 @@
1010
#include "ccu_gate.h"
1111
#include "ccu_mp.h"
1212

13-
static void ccu_mp_find_best(unsigned long parent, unsigned long rate,
14-
unsigned int max_m, unsigned int max_p,
15-
unsigned int *m, unsigned int *p)
13+
static unsigned long ccu_mp_find_best(unsigned long parent, unsigned long rate,
14+
unsigned int max_m, unsigned int max_p,
15+
unsigned int *m, unsigned int *p)
1616
{
1717
unsigned long best_rate = 0;
1818
unsigned int best_m = 0, best_p = 0;
@@ -35,6 +35,8 @@ static void ccu_mp_find_best(unsigned long parent, unsigned long rate,
3535

3636
*m = best_m;
3737
*p = best_p;
38+
39+
return best_rate;
3840
}
3941

4042
static unsigned long ccu_mp_find_best_with_parent_adj(struct clk_hw *hw,
@@ -109,8 +111,7 @@ static unsigned long ccu_mp_round_rate(struct ccu_mux_internal *mux,
109111
max_p = cmp->p.max ?: 1 << ((1 << cmp->p.width) - 1);
110112

111113
if (!clk_hw_can_set_rate_parent(&cmp->common.hw)) {
112-
ccu_mp_find_best(*parent_rate, rate, max_m, max_p, &m, &p);
113-
rate = *parent_rate / p / m;
114+
rate = ccu_mp_find_best(*parent_rate, rate, max_m, max_p, &m, &p);
114115
} else {
115116
rate = ccu_mp_find_best_with_parent_adj(hw, parent_rate, rate,
116117
max_m, max_p);

‎drivers/clk/sunxi-ng/ccu_nk.c

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -15,8 +15,8 @@ struct _ccu_nk {
1515
unsigned long k, min_k, max_k;
1616
};
1717

18-
static void ccu_nk_find_best(unsigned long parent, unsigned long rate,
19-
struct _ccu_nk *nk)
18+
static unsigned long ccu_nk_find_best(unsigned long parent, unsigned long rate,
19+
struct _ccu_nk *nk)
2020
{
2121
unsigned long best_rate = 0;
2222
unsigned int best_k = 0, best_n = 0;
@@ -39,6 +39,8 @@ static void ccu_nk_find_best(unsigned long parent, unsigned long rate,
3939

4040
nk->k = best_k;
4141
nk->n = best_n;
42+
43+
return best_rate;
4244
}
4345

4446
static void ccu_nk_disable(struct clk_hw *hw)
@@ -104,8 +106,7 @@ static long ccu_nk_round_rate(struct clk_hw *hw, unsigned long rate,
104106
_nk.min_k = nk->k.min ?: 1;
105107
_nk.max_k = nk->k.max ?: 1 << nk->k.width;
106108

107-
ccu_nk_find_best(*parent_rate, rate, &_nk);
108-
rate = *parent_rate * _nk.n * _nk.k;
109+
rate = ccu_nk_find_best(*parent_rate, rate, &_nk);
109110

110111
if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
111112
rate = rate / nk->fixed_post_div;

‎drivers/clk/sunxi-ng/ccu_nkm.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -16,8 +16,8 @@ struct _ccu_nkm {
1616
unsigned long m, min_m, max_m;
1717
};
1818

19-
static void ccu_nkm_find_best(unsigned long parent, unsigned long rate,
20-
struct _ccu_nkm *nkm)
19+
static unsigned long ccu_nkm_find_best(unsigned long parent, unsigned long rate,
20+
struct _ccu_nkm *nkm)
2121
{
2222
unsigned long best_rate = 0;
2323
unsigned long best_n = 0, best_k = 0, best_m = 0;
@@ -45,6 +45,8 @@ static void ccu_nkm_find_best(unsigned long parent, unsigned long rate,
4545
nkm->n = best_n;
4646
nkm->k = best_k;
4747
nkm->m = best_m;
48+
49+
return best_rate;
4850
}
4951

5052
static void ccu_nkm_disable(struct clk_hw *hw)
@@ -122,9 +124,7 @@ static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
122124
if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
123125
rate *= nkm->fixed_post_div;
124126

125-
ccu_nkm_find_best(*parent_rate, rate, &_nkm);
126-
127-
rate = *parent_rate * _nkm.n * _nkm.k / _nkm.m;
127+
rate = ccu_nkm_find_best(*parent_rate, rate, &_nkm);
128128

129129
if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
130130
rate /= nkm->fixed_post_div;

‎drivers/clk/sunxi-ng/ccu_nkmp.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -29,8 +29,8 @@ static unsigned long ccu_nkmp_calc_rate(unsigned long parent,
2929
return rate;
3030
}
3131

32-
static void ccu_nkmp_find_best(unsigned long parent, unsigned long rate,
33-
struct _ccu_nkmp *nkmp)
32+
static unsigned long ccu_nkmp_find_best(unsigned long parent, unsigned long rate,
33+
struct _ccu_nkmp *nkmp)
3434
{
3535
unsigned long best_rate = 0;
3636
unsigned long best_n = 0, best_k = 0, best_m = 0, best_p = 0;
@@ -65,6 +65,8 @@ static void ccu_nkmp_find_best(unsigned long parent, unsigned long rate,
6565
nkmp->k = best_k;
6666
nkmp->m = best_m;
6767
nkmp->p = best_p;
68+
69+
return best_rate;
6870
}
6971

7072
static void ccu_nkmp_disable(struct clk_hw *hw)
@@ -150,10 +152,8 @@ static long ccu_nkmp_round_rate(struct clk_hw *hw, unsigned long rate,
150152
_nkmp.min_p = 1;
151153
_nkmp.max_p = nkmp->p.max ?: 1 << ((1 << nkmp->p.width) - 1);
152154

153-
ccu_nkmp_find_best(*parent_rate, rate, &_nkmp);
155+
rate = ccu_nkmp_find_best(*parent_rate, rate, &_nkmp);
154156

155-
rate = ccu_nkmp_calc_rate(*parent_rate, _nkmp.n, _nkmp.k,
156-
_nkmp.m, _nkmp.p);
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if (nkmp->common.features & CCU_FEATURE_FIXED_POSTDIV)
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rate = rate / nkmp->fixed_post_div;
159159

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