Skip to content

Commit 6391030

Browse files
committed
drm/msm/adreno: Remove redundant gmem size param
Even in the ocmem case, the allocated ocmem buffer size should match the requested size. v2: Move stray hunk to previous patch, make OCMEM size mismatch an error condition. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/549759/
1 parent 832ee64 commit 6391030

File tree

5 files changed

+8
-8
lines changed

5 files changed

+8
-8
lines changed

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -205,7 +205,7 @@ static int a2xx_hw_init(struct msm_gpu *gpu)
205205
A2XX_MH_INTERRUPT_MASK_MMU_PAGE_FAULT);
206206

207207
for (i = 3; i <= 5; i++)
208-
if ((SZ_16K << i) == adreno_gpu->gmem)
208+
if ((SZ_16K << i) == adreno_gpu->info->gmem)
209209
break;
210210
gpu_write(gpu, REG_A2XX_RB_EDRAM_INFO, i);
211211

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -749,7 +749,7 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
749749
gpu_write(gpu, REG_A5XX_UCHE_GMEM_RANGE_MIN_LO, 0x00100000);
750750
gpu_write(gpu, REG_A5XX_UCHE_GMEM_RANGE_MIN_HI, 0x00000000);
751751
gpu_write(gpu, REG_A5XX_UCHE_GMEM_RANGE_MAX_LO,
752-
0x00100000 + adreno_gpu->gmem - 1);
752+
0x00100000 + adreno_gpu->info->gmem - 1);
753753
gpu_write(gpu, REG_A5XX_UCHE_GMEM_RANGE_MAX_HI, 0x00000000);
754754

755755
if (adreno_is_a506(adreno_gpu) || adreno_is_a508(adreno_gpu) ||

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1270,7 +1270,7 @@ static int hw_init(struct msm_gpu *gpu)
12701270
gpu_write64(gpu, REG_A6XX_UCHE_GMEM_RANGE_MIN, 0x00100000);
12711271

12721272
gpu_write64(gpu, REG_A6XX_UCHE_GMEM_RANGE_MAX,
1273-
0x00100000 + adreno_gpu->gmem - 1);
1273+
0x00100000 + adreno_gpu->info->gmem - 1);
12741274
}
12751275

12761276
gpu_write(gpu, REG_A6XX_UCHE_FILTER_CNTL, 0x804);

drivers/gpu/drm/msm/adreno/adreno_gpu.c

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -320,7 +320,7 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx,
320320
*value = adreno_gpu->info->revn;
321321
return 0;
322322
case MSM_PARAM_GMEM_SIZE:
323-
*value = adreno_gpu->gmem;
323+
*value = adreno_gpu->info->gmem;
324324
return 0;
325325
case MSM_PARAM_GMEM_BASE:
326326
*value = !adreno_is_a650_family(adreno_gpu) ? 0x100000 : 0;
@@ -1041,14 +1041,16 @@ int adreno_gpu_ocmem_init(struct device *dev, struct adreno_gpu *adreno_gpu,
10411041
return PTR_ERR(ocmem);
10421042
}
10431043

1044-
ocmem_hdl = ocmem_allocate(ocmem, OCMEM_GRAPHICS, adreno_gpu->gmem);
1044+
ocmem_hdl = ocmem_allocate(ocmem, OCMEM_GRAPHICS, adreno_gpu->info->gmem);
10451045
if (IS_ERR(ocmem_hdl))
10461046
return PTR_ERR(ocmem_hdl);
10471047

10481048
adreno_ocmem->ocmem = ocmem;
10491049
adreno_ocmem->base = ocmem_hdl->addr;
10501050
adreno_ocmem->hdl = ocmem_hdl;
1051-
adreno_gpu->gmem = ocmem_hdl->len;
1051+
1052+
if (WARN_ON(ocmem_hdl->len != adreno_gpu->info->gmem))
1053+
return -ENOMEM;
10521054

10531055
return 0;
10541056
}
@@ -1097,7 +1099,6 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
10971099

10981100
adreno_gpu->funcs = funcs;
10991101
adreno_gpu->info = adreno_info(config->rev);
1100-
adreno_gpu->gmem = adreno_gpu->info->gmem;
11011102
adreno_gpu->revn = adreno_gpu->info->revn;
11021103
adreno_gpu->rev = *rev;
11031104

drivers/gpu/drm/msm/adreno/adreno_gpu.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -77,7 +77,6 @@ struct adreno_gpu {
7777
struct msm_gpu base;
7878
struct adreno_rev rev;
7979
const struct adreno_info *info;
80-
uint32_t gmem; /* actual gmem size */
8180
uint32_t revn; /* numeric revision name */
8281
uint16_t speedbin;
8382
const struct adreno_gpu_funcs *funcs;

0 commit comments

Comments
 (0)