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krzkrobherring
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dt-bindings: clock: ti: remove unstable remark
Several TI SoC clock bindings were marked as work-in-progress / unstable between 2013-2016, for example in commit f60b1ea ("CLK: TI: add support for gate clock"). It was enough of time to consider them stable and expect usual ABI rules. Signed-off-by: Krzysztof Kozlowski <[email protected]> Acked-by: Stephen Boyd <[email protected]> Acked-by: Rob Herring <[email protected]> Acked-by: Tony Lindgren <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Herring <[email protected]>
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Documentation/devicetree/bindings/clock/ti/adpll.txt

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Binding for Texas Instruments ADPLL clock.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. It assumes a
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register-mapped ADPLL with two to three selectable input clocks
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and three to four children.

Documentation/devicetree/bindings/clock/ti/apll.txt

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Binding for Texas Instruments APLL clock.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. It assumes a
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register-mapped APLL with usually two selectable input clocks
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(reference clock and bypass clock), with analog phase locked

Documentation/devicetree/bindings/clock/ti/autoidle.txt

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Binding for Texas Instruments autoidle clock.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. It assumes a register mapped
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clock which can be put to idle automatically by hardware based on the usage
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and a configuration bit setting. Autoidle clock is never an individual

Documentation/devicetree/bindings/clock/ti/clockdomain.txt

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Binding for Texas Instruments clockdomain.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1] in consumer role.
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Every clock on TI SoC belongs to one clockdomain, but software
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only needs this information for specific clocks which require

Documentation/devicetree/bindings/clock/ti/composite.txt

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Binding for TI composite clock.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. It assumes a
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register-mapped composite clock with multiple different sub-types;
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Documentation/devicetree/bindings/clock/ti/divider.txt

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Binding for TI divider clock
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. It assumes a
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register-mapped adjustable clock rate divider that does not gate and has
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only one input clock or parent. By default the value programmed into

Documentation/devicetree/bindings/clock/ti/dpll.txt

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Binding for Texas Instruments DPLL clock.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. It assumes a
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register-mapped DPLL with usually two selectable input clocks
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(reference clock and bypass clock), with digital phase locked

Documentation/devicetree/bindings/clock/ti/fapll.txt

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Binding for Texas Instruments FAPLL clock.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. It assumes a
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register-mapped FAPLL with usually two selectable input clocks
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(reference clock and bypass clock), and one or more child

Documentation/devicetree/bindings/clock/ti/fixed-factor-clock.txt

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Binding for TI fixed factor rate clock sources.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1], and also uses the autoidle
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support from TI autoidle clock [2].
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Documentation/devicetree/bindings/clock/ti/gate.txt

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Binding for Texas Instruments gate clock.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. This clock is
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quite much similar to the basic gate-clock [2], however,
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it supports a number of additional features. If no register

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