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Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto updates from Herbert Xu: "API: - Add library interfaces of certain crypto algorithms for WireGuard - Remove the obsolete ablkcipher and blkcipher interfaces - Move add_early_randomness() out of rng_mutex Algorithms: - Add blake2b shash algorithm - Add blake2s shash algorithm - Add curve25519 kpp algorithm - Implement 4 way interleave in arm64/gcm-ce - Implement ciphertext stealing in powerpc/spe-xts - Add Eric Biggers's scalar accelerated ChaCha code for ARM - Add accelerated 32r2 code from Zinc for MIPS - Add OpenSSL/CRYPTOGRAMS poly1305 implementation for ARM and MIPS Drivers: - Fix entropy reading failures in ks-sa - Add support for sam9x60 in atmel - Add crypto accelerator for amlogic GXL - Add sun8i-ce Crypto Engine - Add sun8i-ss cryptographic offloader - Add a host of algorithms to inside-secure - Add NPCM RNG driver - add HiSilicon HPRE accelerator - Add HiSilicon TRNG driver" * git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (285 commits) crypto: vmx - Avoid weird build failures crypto: lib/chacha20poly1305 - use chacha20_crypt() crypto: x86/chacha - only unregister algorithms if registered crypto: chacha_generic - remove unnecessary setkey() functions crypto: amlogic - enable working on big endian kernel crypto: sun8i-ce - enable working on big endian crypto: mips/chacha - select CRYPTO_SKCIPHER, not CRYPTO_BLKCIPHER hwrng: ks-sa - Enable COMPILE_TEST crypto: essiv - remove redundant null pointer check before kfree crypto: atmel-aes - Change data type for "lastc" buffer crypto: atmel-tdes - Set the IV after {en,de}crypt crypto: sun4i-ss - fix big endian issues crypto: sun4i-ss - hide the Invalid keylen message crypto: sun4i-ss - use crypto_ahash_digestsize crypto: sun4i-ss - remove dependency on not 64BIT crypto: sun4i-ss - Fix 64-bit size_t warnings on sun4i-ss-hash.c MAINTAINERS: Add maintainer for HiSilicon SEC V2 driver crypto: hisilicon - add DebugFS for HiSilicon SEC Documentation: add DebugFS doc for HiSilicon SEC crypto: hisilicon - add SRIOV for HiSilicon SEC ...
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‎Documentation/ABI/testing/debugfs-hisi-hpre

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What: /sys/kernel/debug/hisi_hpre/<bdf>/cluster[0-3]/regs
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Date: Sep 2019
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Contact: [email protected]
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Description: Dump debug registers from the HPRE cluster.
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Only available for PF.
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What: /sys/kernel/debug/hisi_hpre/<bdf>/cluster[0-3]/cluster_ctrl
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Date: Sep 2019
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Contact: [email protected]
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Description: Write the HPRE core selection in the cluster into this file,
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and then we can read the debug information of the core.
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Only available for PF.
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What: /sys/kernel/debug/hisi_hpre/<bdf>/rdclr_en
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Date: Sep 2019
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Contact: [email protected]
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Description: HPRE cores debug registers read clear control. 1 means enable
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register read clear, otherwise 0. Writing to this file has no
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functional effect, only enable or disable counters clear after
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reading of these registers.
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Only available for PF.
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What: /sys/kernel/debug/hisi_hpre/<bdf>/current_qm
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Date: Sep 2019
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Contact: [email protected]
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Description: One HPRE controller has one PF and multiple VFs, each function
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has a QM. Select the QM which below qm refers to.
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Only available for PF.
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What: /sys/kernel/debug/hisi_hpre/<bdf>/regs
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Date: Sep 2019
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Contact: [email protected]
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Description: Dump debug registers from the HPRE.
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Only available for PF.
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What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/qm_regs
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Date: Sep 2019
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Contact: [email protected]
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Description: Dump debug registers from the QM.
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Available for PF and VF in host. VF in guest currently only
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has one debug register.
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What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/current_q
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Date: Sep 2019
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Contact: [email protected]
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Description: One QM may contain multiple queues. Select specific queue to
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show its debug registers in above qm_regs.
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Only available for PF.
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What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/clear_enable
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Date: Sep 2019
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Contact: [email protected]
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Description: QM debug registers(qm_regs) read clear control. 1 means enable
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register read clear, otherwise 0.
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Writing to this file has no functional effect, only enable or
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disable counters clear after reading of these registers.
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Only available for PF.

‎Documentation/ABI/testing/debugfs-hisi-sec

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What: /sys/kernel/debug/hisi_sec/<bdf>/sec_dfx
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Date: Oct 2019
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Contact: [email protected]
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Description: Dump the debug registers of SEC cores.
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Only available for PF.
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What: /sys/kernel/debug/hisi_sec/<bdf>/clear_enable
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Date: Oct 2019
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Contact: [email protected]
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Description: Enabling/disabling of clear action after reading
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the SEC debug registers.
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0: disable, 1: enable.
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Only available for PF, and take no other effect on SEC.
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What: /sys/kernel/debug/hisi_sec/<bdf>/current_qm
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Date: Oct 2019
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Contact: [email protected]
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Description: One SEC controller has one PF and multiple VFs, each function
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has a QM. This file can be used to select the QM which below
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qm refers to.
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Only available for PF.
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What: /sys/kernel/debug/hisi_sec/<bdf>/qm/qm_regs
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Date: Oct 2019
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Contact: [email protected]
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Description: Dump of QM related debug registers.
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Available for PF and VF in host. VF in guest currently only
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has one debug register.
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What: /sys/kernel/debug/hisi_sec/<bdf>/qm/current_q
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Date: Oct 2019
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Contact: [email protected]
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Description: One QM of SEC may contain multiple queues. Select specific
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queue to show its debug registers in above 'qm_regs'.
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Only available for PF.
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What: /sys/kernel/debug/hisi_sec/<bdf>/qm/clear_enable
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Date: Oct 2019
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Contact: [email protected]
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Description: Enabling/disabling of clear action after reading
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the SEC's QM debug registers.
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0: disable, 1: enable.
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Only available for PF, and take no other effect on SEC.

‎Documentation/crypto/api-skcipher.rst

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@@ -5,7 +5,7 @@ Block Cipher Algorithm Definitions
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:doc: Block Cipher Algorithm Definitions
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.. kernel-doc:: include/linux/crypto.h
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:functions: crypto_alg ablkcipher_alg blkcipher_alg cipher_alg compress_alg
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:functions: crypto_alg cipher_alg compress_alg
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Symmetric Key Cipher API
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------------------------
@@ -33,30 +33,3 @@ Single Block Cipher API
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.. kernel-doc:: include/linux/crypto.h
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:functions: crypto_alloc_cipher crypto_free_cipher crypto_has_cipher crypto_cipher_blocksize crypto_cipher_setkey crypto_cipher_encrypt_one crypto_cipher_decrypt_one
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Asynchronous Block Cipher API - Deprecated
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------------------------------------------
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.. kernel-doc:: include/linux/crypto.h
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:doc: Asynchronous Block Cipher API
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.. kernel-doc:: include/linux/crypto.h
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:functions: crypto_free_ablkcipher crypto_has_ablkcipher crypto_ablkcipher_ivsize crypto_ablkcipher_blocksize crypto_ablkcipher_setkey crypto_ablkcipher_reqtfm crypto_ablkcipher_encrypt crypto_ablkcipher_decrypt
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Asynchronous Cipher Request Handle - Deprecated
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-----------------------------------------------
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.. kernel-doc:: include/linux/crypto.h
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:doc: Asynchronous Cipher Request Handle
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.. kernel-doc:: include/linux/crypto.h
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:functions: crypto_ablkcipher_reqsize ablkcipher_request_set_tfm ablkcipher_request_alloc ablkcipher_request_free ablkcipher_request_set_callback ablkcipher_request_set_crypt
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Synchronous Block Cipher API - Deprecated
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-----------------------------------------
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.. kernel-doc:: include/linux/crypto.h
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:doc: Synchronous Block Cipher API
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.. kernel-doc:: include/linux/crypto.h
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:functions: crypto_alloc_blkcipher crypto_free_blkcipher crypto_has_blkcipher crypto_blkcipher_name crypto_blkcipher_ivsize crypto_blkcipher_blocksize crypto_blkcipher_setkey crypto_blkcipher_encrypt crypto_blkcipher_encrypt_iv crypto_blkcipher_decrypt crypto_blkcipher_decrypt_iv crypto_blkcipher_set_iv crypto_blkcipher_get_iv

‎Documentation/crypto/architecture.rst

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- CRYPTO_ALG_TYPE_AEAD Authenticated Encryption with Associated Data
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(MAC)
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- CRYPTO_ALG_TYPE_BLKCIPHER Synchronous multi-block cipher
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- CRYPTO_ALG_TYPE_ABLKCIPHER Asynchronous multi-block cipher
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- CRYPTO_ALG_TYPE_KPP Key-agreement Protocol Primitive (KPP) such as
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an ECDH or DH implementation
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‎Documentation/crypto/crypto_engine.rst

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When your driver receives a crypto_request, you must to transfer it to
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the crypto engine via one of:
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* crypto_transfer_ablkcipher_request_to_engine()
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* crypto_transfer_aead_request_to_engine()
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* crypto_transfer_akcipher_request_to_engine()
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At the end of the request process, a call to one of the following functions is needed:
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* crypto_finalize_ablkcipher_request()
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* crypto_finalize_aead_request()
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* crypto_finalize_akcipher_request()

‎Documentation/crypto/devel-algos.rst

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@@ -128,25 +128,20 @@ process requests that are unaligned. This implies, however, additional
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overhead as the kernel crypto API needs to perform the realignment of
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the data which may imply moving of data.
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Cipher Definition With struct blkcipher_alg and ablkcipher_alg
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Cipher Definition With struct skcipher_alg
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Struct blkcipher_alg defines a synchronous block cipher whereas struct
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ablkcipher_alg defines an asynchronous block cipher.
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Struct skcipher_alg defines a multi-block cipher, or more generally, a
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length-preserving symmetric cipher algorithm.
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Please refer to the single block cipher description for schematics of
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the block cipher usage.
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Scatterlist handling
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~~~~~~~~~~~~~~~~~~~~
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Specifics Of Asynchronous Multi-Block Cipher
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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There are a couple of specifics to the asynchronous interface.
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First of all, some of the drivers will want to use the Generic
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ScatterWalk in case the hardware needs to be fed separate chunks of the
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scatterlist which contains the plaintext and will contain the
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ciphertext. Please refer to the ScatterWalk interface offered by the
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Linux kernel scatter / gather list implementation.
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Some drivers will want to use the Generic ScatterWalk in case the
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hardware needs to be fed separate chunks of the scatterlist which
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contains the plaintext and will contain the ciphertext. Please refer
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to the ScatterWalk interface offered by the Linux kernel scatter /
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gather list implementation.
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Hashing [HASH]
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--------------

‎Documentation/devicetree/bindings/crypto/allwinner,sun8i-ss.yaml

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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/crypto/allwinner,sun8i-ss.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner Security System v2 driver
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maintainers:
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- Corentin Labbe <[email protected]>
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properties:
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compatible:
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enum:
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- allwinner,sun8i-a83t-crypto
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- allwinner,sun9i-a80-crypto
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: Bus clock
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- description: Module clock
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clock-names:
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items:
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- const: bus
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- const: mod
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resets:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- resets
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/sun8i-a83t-ccu.h>
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#include <dt-bindings/reset/sun8i-a83t-ccu.h>
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crypto: crypto@1c15000 {
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compatible = "allwinner,sun8i-a83t-crypto";
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reg = <0x01c15000 0x1000>;
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interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&ccu RST_BUS_SS>;
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clocks = <&ccu CLK_BUS_SS>, <&ccu CLK_SS>;
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clock-names = "bus", "mod";
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};

‎Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml

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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/crypto/amlogic,gxl-crypto.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic GXL Cryptographic Offloader
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maintainers:
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- Corentin Labbe <[email protected]>
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properties:
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compatible:
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items:
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- const: amlogic,gxl-crypto
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: "Interrupt for flow 0"
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- description: "Interrupt for flow 1"
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clocks:
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maxItems: 1
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clock-names:
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const: blkmv
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/gxbb-clkc.h>
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crypto: crypto-engine@c883e000 {
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compatible = "amlogic,gxl-crypto";
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reg = <0x0 0xc883e000 0x0 0x36>;
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interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc CLKID_BLKMV>;
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clock-names = "blkmv";
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};

‎Documentation/devicetree/bindings/rng/atmel-trng.txt

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Atmel TRNG (True Random Number Generator) block
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Required properties:
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- compatible : Should be "atmel,at91sam9g45-trng"
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- compatible : Should be "atmel,at91sam9g45-trng" or "microchip,sam9x60-trng"
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- reg : Offset and length of the register set of this block
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- interrupts : the interrupt number for the TRNG block
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- clocks: should contain the TRNG clk source

‎Documentation/devicetree/bindings/rng/nuvoton,npcm-rng.txt

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NPCM SoC Random Number Generator
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Required properties:
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- compatible : "nuvoton,npcm750-rng" for the NPCM7XX BMC.
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- reg : Specifies physical base address and size of the registers.
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Example:
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rng: rng@f000b000 {
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compatible = "nuvoton,npcm750-rng";
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reg = <0xf000b000 0x8>;
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};

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