@@ -64,13 +64,13 @@ static inline void atomic_##op(int i, atomic_t *v) \
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int result; \
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\
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__asm__ __volatile__( \
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- "1: l32ex %1 , %3 \n" \
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- " " #op " %0 , %1 , %2 \n" \
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- " s32ex %0 , %3 \n" \
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- " getex %0 \n" \
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- " beqz %0 , 1b\n" \
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- : "=&a" (result), "=&a" (tmp) \
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- : "a" (i), "a" (v) \
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+ "1: l32ex %[tmp] , %[addr] \n" \
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+ " " #op " %[result] , %[tmp] , %[i] \n" \
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+ " s32ex %[result] , %[addr] \n" \
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+ " getex %[result] \n" \
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+ " beqz %[result] , 1b\n" \
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+ : [result] "=&a" (result), [tmp] "=&a" (tmp) \
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+ : [i] "a" (i), [addr] "a" (v) \
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: "memory" \
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); \
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} \
@@ -82,14 +82,14 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \
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int result; \
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\
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__asm__ __volatile__( \
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- "1: l32ex %1 , %3 \n" \
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- " " #op " %0 , %1 , %2 \n" \
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- " s32ex %0 , %3 \n" \
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- " getex %0 \n" \
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- " beqz %0 , 1b\n" \
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- " " #op " %0 , %1 , %2 \n" \
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- : "=&a" (result), "=&a" (tmp) \
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- : "a" (i), "a" (v) \
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+ "1: l32ex %[tmp] , %[addr] \n" \
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+ " " #op " %[result] , %[tmp] , %[i] \n" \
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+ " s32ex %[result] , %[addr] \n" \
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+ " getex %[result] \n" \
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+ " beqz %[result] , 1b\n" \
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+ " " #op " %[result] , %[tmp] , %[i] \n" \
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+ : [result] "=&a" (result), [tmp] "=&a" (tmp) \
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+ : [i] "a" (i), [addr] "a" (v) \
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: "memory" \
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); \
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\
@@ -103,13 +103,13 @@ static inline int atomic_fetch_##op(int i, atomic_t *v) \
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int result; \
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\
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__asm__ __volatile__( \
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- "1: l32ex %1 , %3 \n" \
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- " " #op " %0 , %1 , %2 \n" \
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- " s32ex %0 , %3 \n" \
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- " getex %0 \n" \
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- " beqz %0 , 1b\n" \
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- : "=&a" (result), "=&a" (tmp) \
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- : "a" (i), "a" (v) \
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+ "1: l32ex %[tmp] , %[addr] \n" \
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+ " " #op " %[result] , %[tmp] , %[i] \n" \
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+ " s32ex %[result] , %[addr] \n" \
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+ " getex %[result] \n" \
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+ " beqz %[result] , 1b\n" \
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+ : [result] "=&a" (result), [tmp] "=&a" (tmp) \
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+ : [i] "a" (i), [addr] "a" (v) \
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: "memory" \
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); \
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\
@@ -124,13 +124,13 @@ static inline void atomic_##op(int i, atomic_t * v) \
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int result; \
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\
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__asm__ __volatile__( \
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- "1: l32i %1 , %3 , 0\n" \
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- " wsr %1 , scompare1\n" \
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- " " #op " %0 , %1 , %2 \n" \
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- " s32c1i %0 , %3 , 0\n" \
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- " bne %0 , %1 , 1b\n" \
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- : "=&a" (result), "=&a" (tmp) \
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- : "a" (i), "a" (v) \
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+ "1: l32i %[tmp] , %[addr] , 0\n" \
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+ " wsr %[tmp] , scompare1\n" \
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+ " " #op " %[result] , %[tmp] , %[i] \n" \
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+ " s32c1i %[result] , %[addr] , 0\n" \
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+ " bne %[result] , %[tmp] , 1b\n" \
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+ : [result] "=&a" (result), [tmp] "=&a" (tmp) \
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+ : [i] "a" (i), [addr] "a" (v) \
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: "memory" \
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); \
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} \
@@ -142,14 +142,14 @@ static inline int atomic_##op##_return(int i, atomic_t * v) \
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int result; \
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\
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__asm__ __volatile__( \
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- "1: l32i %1 , %3 , 0\n" \
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- " wsr %1 , scompare1\n" \
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- " " #op " %0 , %1 , %2 \n" \
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- " s32c1i %0 , %3 , 0\n" \
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- " bne %0 , %1 , 1b\n" \
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- " " #op " %0 , %0 , %2 \n" \
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- : "=&a" (result), "=&a" (tmp) \
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- : "a" (i), "a" (v) \
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+ "1: l32i %[tmp] , %[addr] , 0\n" \
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+ " wsr %[tmp] , scompare1\n" \
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+ " " #op " %[result] , %[tmp] , %[i] \n" \
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+ " s32c1i %[result] , %[addr] , 0\n" \
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+ " bne %[result] , %[tmp] , 1b\n" \
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+ " " #op " %[result] , %[result] , %[i] \n" \
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+ : [result] "=&a" (result), [tmp] "=&a" (tmp) \
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+ : [i] "a" (i), [addr] "a" (v) \
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: "memory" \
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); \
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\
@@ -163,13 +163,13 @@ static inline int atomic_fetch_##op(int i, atomic_t * v) \
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int result; \
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\
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__asm__ __volatile__( \
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- "1: l32i %1 , %3 , 0\n" \
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- " wsr %1 , scompare1\n" \
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- " " #op " %0 , %1 , %2 \n" \
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- " s32c1i %0 , %3 , 0\n" \
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- " bne %0 , %1 , 1b\n" \
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- : "=&a" (result), "=&a" (tmp) \
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- : "a" (i), "a" (v) \
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+ "1: l32i %[tmp] , %[addr] , 0\n" \
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+ " wsr %[tmp] , scompare1\n" \
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+ " " #op " %[result] , %[tmp] , %[i] \n" \
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+ " s32c1i %[result] , %[addr] , 0\n" \
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+ " bne %[result] , %[tmp] , 1b\n" \
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+ : [result] "=&a" (result), [tmp] "=&a" (tmp) \
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+ : [i] "a" (i), [addr] "a" (v) \
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: "memory" \
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); \
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\
@@ -184,14 +184,14 @@ static inline void atomic_##op(int i, atomic_t * v) \
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unsigned int vval; \
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\
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__asm__ __volatile__( \
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- " rsil a15, "__stringify(TOPLEVEL)"\n"\
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- " l32i %0 , %2 , 0\n" \
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- " " #op " %0 , %0 , %1 \n" \
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- " s32i %0 , %2 , 0\n" \
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+ " rsil a15, "__stringify(TOPLEVEL)"\n" \
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+ " l32i %[result] , %[addr] , 0\n" \
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+ " " #op " %[result] , %[result] , %[i] \n" \
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+ " s32i %[result] , %[addr] , 0\n" \
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" wsr a15, ps\n" \
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" rsync\n" \
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- : "=&a" (vval) \
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- : "a" (i), "a" (v) \
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+ : [result] "=&a" (vval) \
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+ : [i] "a" (i), [addr] "a" (v) \
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: "a15", "memory" \
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); \
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} \
@@ -203,13 +203,13 @@ static inline int atomic_##op##_return(int i, atomic_t * v) \
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\
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__asm__ __volatile__( \
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" rsil a15,"__stringify(TOPLEVEL)"\n" \
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- " l32i %0 , %2 , 0\n" \
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- " " #op " %0 , %0 , %1 \n" \
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- " s32i %0 , %2 , 0\n" \
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+ " l32i %[result] , %[addr] , 0\n" \
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+ " " #op " %[result] , %[result] , %[i] \n" \
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+ " s32i %[result] , %[addr] , 0\n" \
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" wsr a15, ps\n" \
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" rsync\n" \
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- : "=&a" (vval) \
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- : "a" (i), "a" (v) \
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+ : [result] "=&a" (vval) \
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+ : [i] "a" (i), [addr] "a" (v) \
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: "a15", "memory" \
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); \
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\
@@ -223,13 +223,13 @@ static inline int atomic_fetch_##op(int i, atomic_t * v) \
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\
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__asm__ __volatile__( \
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" rsil a15,"__stringify(TOPLEVEL)"\n" \
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- " l32i %0 , %3 , 0\n" \
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- " " #op " %1 , %0 , %2 \n" \
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- " s32i %1 , %3 , 0\n" \
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+ " l32i %[result] , %[addr] , 0\n" \
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+ " " #op " %[tmp] , %[result] , %[i] \n" \
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+ " s32i %[tmp] , %[addr] , 0\n" \
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" wsr a15, ps\n" \
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" rsync\n" \
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- : "=&a" (vval), "=&a" (tmp) \
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- : "a" (i), "a" (v) \
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+ : [result] "=&a" (vval), [tmp] "=&a" (tmp) \
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+ : [i] "a" (i), [addr] "a" (v) \
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: "a15", "memory" \
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); \
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\
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