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dt-bindings: pinctrl: Add pinctrl for Sophgo CV1800 series SoC.
Add pinctrl support for Sophgo CV1800 series SoC. Signed-off-by: Inochi Amaoto <[email protected]> Reviewed-by: Rob Herring (Arm) <[email protected]> Link: https://lore.kernel.org/IA1PR20MB4953680DE7977CAD906DBDB4BBB32@IA1PR20MB4953.namprd20.prod.outlook.com Signed-off-by: Linus Walleij <[email protected]>
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‎Documentation/devicetree/bindings/pinctrl/sophgo,cv1800-pinctrl.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/sophgo,cv1800-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Sophgo CV1800 Pin Controller
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maintainers:
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- Inochi Amaoto <[email protected]>
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properties:
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compatible:
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enum:
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- sophgo,cv1800b-pinctrl
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- sophgo,cv1812h-pinctrl
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- sophgo,sg2000-pinctrl
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- sophgo,sg2002-pinctrl
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reg:
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items:
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- description: pinctrl for system domain
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- description: pinctrl for rtc domain
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reg-names:
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items:
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- const: sys
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- const: rtc
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resets:
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maxItems: 1
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patternProperties:
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'-cfg$':
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type: object
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description:
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A pinctrl node should contain at least one subnode representing the
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pinctrl groups available on the machine.
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additionalProperties: false
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patternProperties:
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'-pins$':
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type: object
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description: |
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Each subnode will list the pins it needs, and how they should
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be configured, with regard to muxer configuration, bias, input
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enable/disable, input schmitt trigger, slew-rate, drive strength
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and bus hold state. In addition, all pins in the same subnode
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should have the same power domain. For configuration detail,
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refer to https://github.com/sophgo/sophgo-doc/.
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allOf:
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- $ref: pincfg-node.yaml#
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- $ref: pinmux-node.yaml#
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properties:
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pinmux:
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description: |
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The list of GPIOs and their mux settings that properties in the
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node apply to. This should be set using the GPIOMUX or GPIOMUX2
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macro.
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bias-pull-up:
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type: boolean
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bias-pull-down:
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type: boolean
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drive-strength-microamp:
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description: typical current when output high level.
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input-schmitt-microvolt:
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description: typical threshold for schmitt trigger.
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power-source:
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description: power supplies at X mV.
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enum: [ 1800, 3300 ]
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slew-rate:
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description: slew rate for output buffer (0 is fast, 1 is slow)
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enum: [ 0, 1 ]
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bias-bus-hold: true
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required:
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- pinmux
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- power-source
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additionalProperties: false
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required:
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- compatible
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- reg
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- reg-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/pinctrl/pinctrl-cv1800b.h>
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pinctrl@3001000 {
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compatible = "sophgo,cv1800b-pinctrl";
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reg = <0x03001000 0x1000>,
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<0x05027000 0x1000>;
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reg-names = "sys", "rtc";
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uart0_cfg: uart0-cfg {
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uart0-pins {
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pinmux = <PINMUX(PIN_UART0_TX, 0)>,
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<PINMUX(PIN_UART0_RX, 0)>;
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bias-pull-up;
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drive-strength-microamp = <10800>;
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input-schmitt-microvolt = <0>;
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power-source = <3300>;
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slew-rate = <0>;
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};
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};
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};
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...

‎include/dt-bindings/pinctrl/pinctrl-cv1800b.h

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/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
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/*
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* Copyright (C) 2024 Inochi Amaoto <[email protected]>
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*
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* This file is generated from vendor pinout definition.
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*/
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#ifndef _DT_BINDINGS_PINCTRL_CV1800B_H
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#define _DT_BINDINGS_PINCTRL_CV1800B_H
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#include <dt-bindings/pinctrl/pinctrl-cv18xx.h>
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#define PIN_AUD_AOUTR 1
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#define PIN_SD0_CLK 3
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#define PIN_SD0_CMD 4
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#define PIN_SD0_D0 5
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#define PIN_SD0_D1 7
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#define PIN_SD0_D2 8
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#define PIN_SD0_D3 9
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#define PIN_SD0_CD 11
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#define PIN_SD0_PWR_EN 12
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#define PIN_SPK_EN 14
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#define PIN_UART0_TX 15
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#define PIN_UART0_RX 16
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#define PIN_SPINOR_HOLD_X 17
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#define PIN_SPINOR_SCK 18
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#define PIN_SPINOR_MOSI 19
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#define PIN_SPINOR_WP_X 20
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#define PIN_SPINOR_MISO 21
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#define PIN_SPINOR_CS_X 22
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#define PIN_IIC0_SCL 23
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#define PIN_IIC0_SDA 24
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#define PIN_AUX0 25
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#define PIN_PWR_VBAT_DET 30
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#define PIN_PWR_SEQ2 31
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#define PIN_XTAL_XIN 33
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#define PIN_SD1_GPIO0 35
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#define PIN_SD1_GPIO1 36
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#define PIN_SD1_D3 38
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#define PIN_SD1_D2 39
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#define PIN_SD1_D1 40
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#define PIN_SD1_D0 41
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#define PIN_SD1_CMD 42
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#define PIN_SD1_CLK 43
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#define PIN_ADC1 44
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#define PIN_USB_VBUS_DET 45
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#define PIN_ETH_TXP 47
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#define PIN_ETH_TXM 48
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#define PIN_ETH_RXP 49
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#define PIN_ETH_RXM 50
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#define PIN_MIPIRX4N 56
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#define PIN_MIPIRX4P 57
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#define PIN_MIPIRX3N 58
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#define PIN_MIPIRX3P 59
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#define PIN_MIPIRX2N 60
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#define PIN_MIPIRX2P 61
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#define PIN_MIPIRX1N 62
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#define PIN_MIPIRX1P 63
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#define PIN_MIPIRX0N 64
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#define PIN_MIPIRX0P 65
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#define PIN_AUD_AINL_MIC 67
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#endif /* _DT_BINDINGS_PINCTRL_CV1800B_H */

‎include/dt-bindings/pinctrl/pinctrl-cv1812h.h

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/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
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/*
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* Copyright (C) 2024 Inochi Amaoto <[email protected]>
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*
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* This file is generated from vendor pinout definition.
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*/
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#ifndef _DT_BINDINGS_PINCTRL_CV1812H_H
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#define _DT_BINDINGS_PINCTRL_CV1812H_H
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#include <dt-bindings/pinctrl/pinctrl-cv18xx.h>
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#define PINPOS(row, col) \
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((((row) - 'A' + 1) << 8) + ((col) - 1))
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#define PIN_MIPI_TXM4 PINPOS('A', 2)
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#define PIN_MIPIRX0N PINPOS('A', 4)
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#define PIN_MIPIRX3P PINPOS('A', 6)
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#define PIN_MIPIRX4P PINPOS('A', 7)
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#define PIN_VIVO_D2 PINPOS('A', 9)
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#define PIN_VIVO_D3 PINPOS('A', 10)
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#define PIN_VIVO_D10 PINPOS('A', 12)
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#define PIN_USB_VBUS_DET PINPOS('A', 13)
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#define PIN_MIPI_TXP3 PINPOS('B', 1)
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#define PIN_MIPI_TXM3 PINPOS('B', 2)
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#define PIN_MIPI_TXP4 PINPOS('B', 3)
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#define PIN_MIPIRX0P PINPOS('B', 4)
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#define PIN_MIPIRX1N PINPOS('B', 5)
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#define PIN_MIPIRX2N PINPOS('B', 6)
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#define PIN_MIPIRX4N PINPOS('B', 7)
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#define PIN_MIPIRX5N PINPOS('B', 8)
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#define PIN_VIVO_D1 PINPOS('B', 9)
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#define PIN_VIVO_D5 PINPOS('B', 10)
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#define PIN_VIVO_D7 PINPOS('B', 11)
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#define PIN_VIVO_D9 PINPOS('B', 12)
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#define PIN_USB_ID PINPOS('B', 13)
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#define PIN_ETH_RXM PINPOS('B', 15)
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#define PIN_MIPI_TXP2 PINPOS('C', 1)
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#define PIN_MIPI_TXM2 PINPOS('C', 2)
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#define PIN_CAM_PD0 PINPOS('C', 3)
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#define PIN_CAM_MCLK0 PINPOS('C', 4)
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#define PIN_MIPIRX1P PINPOS('C', 5)
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#define PIN_MIPIRX2P PINPOS('C', 6)
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#define PIN_MIPIRX3N PINPOS('C', 7)
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#define PIN_MIPIRX5P PINPOS('C', 8)
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#define PIN_VIVO_CLK PINPOS('C', 9)
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#define PIN_VIVO_D6 PINPOS('C', 10)
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#define PIN_VIVO_D8 PINPOS('C', 11)
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#define PIN_USB_VBUS_EN PINPOS('C', 12)
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#define PIN_ETH_RXP PINPOS('C', 14)
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#define PIN_GPIO_RTX PINPOS('C', 15)
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#define PIN_MIPI_TXP1 PINPOS('D', 1)
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#define PIN_MIPI_TXM1 PINPOS('D', 2)
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#define PIN_CAM_MCLK1 PINPOS('D', 3)
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#define PIN_IIC3_SCL PINPOS('D', 4)
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#define PIN_VIVO_D4 PINPOS('D', 10)
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#define PIN_ETH_TXM PINPOS('D', 14)
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#define PIN_ETH_TXP PINPOS('D', 15)
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#define PIN_MIPI_TXP0 PINPOS('E', 1)
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#define PIN_MIPI_TXM0 PINPOS('E', 2)
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#define PIN_CAM_PD1 PINPOS('E', 4)
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#define PIN_CAM_RST0 PINPOS('E', 5)
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#define PIN_VIVO_D0 PINPOS('E', 10)
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#define PIN_ADC1 PINPOS('E', 13)
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#define PIN_ADC2 PINPOS('E', 14)
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#define PIN_ADC3 PINPOS('E', 15)
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#define PIN_AUD_AOUTL PINPOS('F', 2)
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#define PIN_IIC3_SDA PINPOS('F', 4)
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#define PIN_SD1_D2 PINPOS('F', 14)
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#define PIN_AUD_AOUTR PINPOS('G', 2)
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#define PIN_SD1_D3 PINPOS('G', 13)
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#define PIN_SD1_CLK PINPOS('G', 14)
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#define PIN_SD1_CMD PINPOS('G', 15)
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#define PIN_AUD_AINL_MIC PINPOS('H', 1)
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#define PIN_RSTN PINPOS('H', 12)
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#define PIN_PWM0_BUCK PINPOS('H', 13)
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#define PIN_SD1_D1 PINPOS('H', 14)
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#define PIN_SD1_D0 PINPOS('H', 15)
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#define PIN_AUD_AINR_MIC PINPOS('J', 1)
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#define PIN_IIC2_SCL PINPOS('J', 13)
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#define PIN_IIC2_SDA PINPOS('J', 14)
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#define PIN_SD0_CD PINPOS('K', 2)
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#define PIN_SD0_D1 PINPOS('K', 3)
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#define PIN_UART2_RX PINPOS('K', 13)
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#define PIN_UART2_CTS PINPOS('K', 14)
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#define PIN_UART2_TX PINPOS('K', 15)
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#define PIN_SD0_CLK PINPOS('L', 1)
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#define PIN_SD0_D0 PINPOS('L', 2)
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#define PIN_SD0_CMD PINPOS('L', 3)
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#define PIN_CLK32K PINPOS('L', 14)
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#define PIN_UART2_RTS PINPOS('L', 15)
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#define PIN_SD0_D3 PINPOS('M', 1)
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#define PIN_SD0_D2 PINPOS('M', 2)
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#define PIN_UART0_RX PINPOS('M', 4)
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#define PIN_UART0_TX PINPOS('M', 5)
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#define PIN_JTAG_CPU_TRST PINPOS('M', 6)
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#define PIN_PWR_ON PINPOS('M', 11)
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#define PIN_PWR_GPIO2 PINPOS('M', 12)
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#define PIN_PWR_GPIO0 PINPOS('M', 13)
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#define PIN_CLK25M PINPOS('M', 14)
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#define PIN_SD0_PWR_EN PINPOS('N', 1)
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#define PIN_SPK_EN PINPOS('N', 3)
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#define PIN_JTAG_CPU_TCK PINPOS('N', 4)
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#define PIN_JTAG_CPU_TMS PINPOS('N', 6)
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#define PIN_PWR_WAKEUP1 PINPOS('N', 11)
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#define PIN_PWR_WAKEUP0 PINPOS('N', 12)
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#define PIN_PWR_GPIO1 PINPOS('N', 13)
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#define PIN_EMMC_DAT3 PINPOS('P', 1)
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#define PIN_EMMC_DAT0 PINPOS('P', 2)
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#define PIN_EMMC_DAT2 PINPOS('P', 3)
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#define PIN_EMMC_RSTN PINPOS('P', 4)
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#define PIN_AUX0 PINPOS('P', 5)
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#define PIN_IIC0_SDA PINPOS('P', 6)
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#define PIN_PWR_SEQ3 PINPOS('P', 10)
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#define PIN_PWR_VBAT_DET PINPOS('P', 11)
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#define PIN_PWR_SEQ1 PINPOS('P', 12)
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#define PIN_PWR_BUTTON1 PINPOS('P', 13)
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#define PIN_EMMC_DAT1 PINPOS('R', 2)
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#define PIN_EMMC_CMD PINPOS('R', 3)
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#define PIN_EMMC_CLK PINPOS('R', 4)
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#define PIN_IIC0_SCL PINPOS('R', 6)
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#define PIN_GPIO_ZQ PINPOS('R', 10)
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#define PIN_PWR_RSTN PINPOS('R', 11)
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#define PIN_PWR_SEQ2 PINPOS('R', 12)
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#define PIN_XTAL_XIN PINPOS('R', 13)
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#endif /* _DT_BINDINGS_PINCTRL_CV1812H_H */

‎include/dt-bindings/pinctrl/pinctrl-cv18xx.h

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/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
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/*
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* Copyright (C) 2023 Sophgo Ltd.
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*
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* Author: Inochi Amaoto <[email protected]>
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*/
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#ifndef _DT_BINDINGS_PINCTRL_CV18XX_H
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#define _DT_BINDINGS_PINCTRL_CV18XX_H
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#define PIN_MUX_INVALD 0xff
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#define PINMUX2(pin, mux, mux2) \
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(((pin) & 0xffff) | (((mux) & 0xff) << 16) | (((mux2) & 0xff) << 24))
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#define PINMUX(pin, mux) \
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PINMUX2(pin, mux, PIN_MUX_INVALD)
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#endif /* _DT_BINDINGS_PINCTRL_CV18XX_H */

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