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#define DEFAULT_IO_MACRO_IO2_IO3_MASK GENMASK(15, 4)
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#define IO_MACRO_IO2_IO3_SWAP 0x4640
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+ /* We always configure 4 bytes per FIFO word */
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+ #define BYTES_PER_FIFO_WORD 4
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+
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struct qcom_geni_private_data {
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/* NOTE: earlycon port will have NULL here */
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struct uart_driver * drv ;
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u32 poll_cached_bytes ;
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unsigned int poll_cached_bytes_cnt ;
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+
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+ u32 write_cached_bytes ;
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+ unsigned int write_cached_bytes_cnt ;
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};
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struct qcom_geni_serial_port {
@@ -121,8 +127,6 @@ struct qcom_geni_serial_port {
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bool setup ;
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int (* handle_rx )(struct uart_port * uport , u32 bytes , bool drop );
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unsigned int baud ;
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- unsigned int tx_bytes_pw ;
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- unsigned int rx_bytes_pw ;
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void * rx_fifo ;
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u32 loopback ;
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bool brk ;
@@ -390,13 +394,25 @@ static void qcom_geni_serial_poll_put_char(struct uart_port *uport,
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#ifdef CONFIG_SERIAL_QCOM_GENI_CONSOLE
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static void qcom_geni_serial_wr_char (struct uart_port * uport , int ch )
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{
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- writel (ch , uport -> membase + SE_GENI_TX_FIFOn );
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+ struct qcom_geni_private_data * private_data = uport -> private_data ;
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+
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+ private_data -> write_cached_bytes =
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+ (private_data -> write_cached_bytes >> 8 ) | (ch << 24 );
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+ private_data -> write_cached_bytes_cnt ++ ;
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+
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+ if (private_data -> write_cached_bytes_cnt == BYTES_PER_FIFO_WORD ) {
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+ writel (private_data -> write_cached_bytes ,
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+ uport -> membase + SE_GENI_TX_FIFOn );
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+ private_data -> write_cached_bytes_cnt = 0 ;
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+ }
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}
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static void
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__qcom_geni_serial_console_write (struct uart_port * uport , const char * s ,
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unsigned int count )
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{
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+ struct qcom_geni_private_data * private_data = uport -> private_data ;
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+
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int i ;
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u32 bytes_to_send = count ;
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@@ -431,6 +447,15 @@ __qcom_geni_serial_console_write(struct uart_port *uport, const char *s,
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SE_GENI_M_IRQ_CLEAR );
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i += chars_to_write ;
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}
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+
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+ if (private_data -> write_cached_bytes_cnt ) {
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+ private_data -> write_cached_bytes >>= BITS_PER_BYTE *
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+ (BYTES_PER_FIFO_WORD - private_data -> write_cached_bytes_cnt );
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+ writel (private_data -> write_cached_bytes ,
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+ uport -> membase + SE_GENI_TX_FIFOn );
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+ private_data -> write_cached_bytes_cnt = 0 ;
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+ }
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+
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qcom_geni_serial_poll_tx_done (uport );
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}
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@@ -503,7 +528,7 @@ static int handle_rx_console(struct uart_port *uport, u32 bytes, bool drop)
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tport = & uport -> state -> port ;
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for (i = 0 ; i < bytes ; ) {
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int c ;
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- int chunk = min_t (int , bytes - i , port -> rx_bytes_pw );
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+ int chunk = min_t (int , bytes - i , BYTES_PER_FIFO_WORD );
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ioread32_rep (uport -> membase + SE_GENI_RX_FIFOn , buf , 1 );
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i += chunk ;
@@ -683,11 +708,11 @@ static void qcom_geni_serial_handle_rx(struct uart_port *uport, bool drop)
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if (!word_cnt )
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return ;
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- total_bytes = port -> rx_bytes_pw * (word_cnt - 1 );
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+ total_bytes = BYTES_PER_FIFO_WORD * (word_cnt - 1 );
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if (last_word_partial && last_word_byte_cnt )
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total_bytes += last_word_byte_cnt ;
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else
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- total_bytes += port -> rx_bytes_pw ;
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+ total_bytes += BYTES_PER_FIFO_WORD ;
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port -> handle_rx (uport , total_bytes , drop );
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}
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@@ -720,7 +745,7 @@ static void qcom_geni_serial_handle_tx(struct uart_port *uport, bool done,
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}
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avail = port -> tx_fifo_depth - (status & TX_FIFO_WC );
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- avail *= port -> tx_bytes_pw ;
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+ avail *= BYTES_PER_FIFO_WORD ;
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tail = xmit -> tail ;
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chunk = min (avail , pending );
@@ -744,7 +769,7 @@ static void qcom_geni_serial_handle_tx(struct uart_port *uport, bool done,
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int c ;
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memset (buf , 0 , ARRAY_SIZE (buf ));
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- tx_bytes = min_t (size_t , remaining , port -> tx_bytes_pw );
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+ tx_bytes = min_t (size_t , remaining , BYTES_PER_FIFO_WORD );
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for (c = 0 ; c < tx_bytes ; c ++ ) {
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buf [c ] = xmit -> buf [tail ++ ];
@@ -861,12 +886,6 @@ static int qcom_geni_serial_port_setup(struct uart_port *uport)
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u32 proto ;
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u32 pin_swap ;
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- if (uart_console (uport ))
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- port -> tx_bytes_pw = 1 ;
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- else
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- port -> tx_bytes_pw = 4 ;
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- port -> rx_bytes_pw = 4 ;
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-
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proto = geni_se_read_proto (& port -> se );
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if (proto != GENI_SE_UART ) {
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dev_err (uport -> dev , "Invalid FW loaded, proto: %d\n" , proto );
@@ -898,10 +917,8 @@ static int qcom_geni_serial_port_setup(struct uart_port *uport)
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*/
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if (uart_console (uport ))
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qcom_geni_serial_poll_tx_done (uport );
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- geni_se_config_packing (& port -> se , BITS_PER_BYTE , port -> tx_bytes_pw ,
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- false, true, false);
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- geni_se_config_packing (& port -> se , BITS_PER_BYTE , port -> rx_bytes_pw ,
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- false, false, true);
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+ geni_se_config_packing (& port -> se , BITS_PER_BYTE , BYTES_PER_FIFO_WORD ,
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+ false, true, true);
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geni_se_init (& port -> se , UART_RX_WM , port -> rx_fifo_depth - 2 );
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geni_se_select_mode (& port -> se , GENI_SE_FIFO );
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port -> setup = true;
@@ -1197,8 +1214,8 @@ static int __init qcom_geni_serial_earlycon_setup(struct earlycon_device *dev,
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*/
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qcom_geni_serial_poll_tx_done (uport );
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qcom_geni_serial_abort_rx (uport );
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- geni_se_config_packing (& se , BITS_PER_BYTE , 1 , false, true, false);
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- geni_se_config_packing ( & se , BITS_PER_BYTE , 4 , false, false , true);
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+ geni_se_config_packing (& se , BITS_PER_BYTE , BYTES_PER_FIFO_WORD ,
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+ false, true , true);
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geni_se_init (& se , DEF_FIFO_DEPTH_WORDS / 2 , DEF_FIFO_DEPTH_WORDS - 2 );
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geni_se_select_mode (& se , GENI_SE_FIFO );
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