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+ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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+ %YAML 1.2
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+ ---
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+ $id : http://devicetree.org/schemas/watchdog/cdns,wdt-r1p2.yaml#
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+ $schema : http://devicetree.org/meta-schemas/core.yaml#
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+
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+ title : Cadence watchdog timer controller
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+
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+ maintainers :
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+ -
Neeli Srinivas <[email protected] >
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+
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+ description :
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+ The cadence watchdog timer is used to detect and recover from
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+ system malfunctions. This watchdog contains 24 bit counter and
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+ a programmable reset period. The timeout period varies from 1 ms
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+ to 30 seconds while using a 100Mhz clock.
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+
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+ allOf :
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+ - $ref : watchdog.yaml#
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+
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+ properties :
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+ compatible :
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+ enum :
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+ - cdns,wdt-r1p2
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+
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+ reg :
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+ maxItems : 1
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+
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+ clocks :
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+ maxItems : 1
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+
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+ interrupts :
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+ maxItems : 1
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+
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+ reset-on-timeout :
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+ type : boolean
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+ description : |
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+ If this property exists, then a reset is done when watchdog
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+ times out.
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+
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+ required :
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+ - compatible
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+ - reg
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+ - clocks
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+ - interrupts
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+
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+ unevaluatedProperties : false
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+
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+ examples :
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+ - |
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+ #include <dt-bindings/interrupt-controller/arm-gic.h>
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+
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+ watchdog@f8005000 {
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+ compatible = "cdns,wdt-r1p2";
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+ reg = <0xf8005000 0x1000>;
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+ clocks = <&clkc 45>;
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+ interrupt-parent = <&intc>;
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+ interrupts = <GIC_SPI 9 IRQ_TYPE_EDGE_RISING>;
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+ reset-on-timeout;
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+ timeout-sec = <10>;
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+ };
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+ ...
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