@@ -6070,6 +6070,54 @@ writes to the CNTVCT_EL0 and CNTPCT_EL0 registers using the SET_ONE_REG
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interface. No error will be returned, but the resulting offset will not be
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applied.
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+ 4.139 KVM_ARM_GET_REG_WRITABLE_MASKS
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+ -------------------------------------------
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+
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+ :Capability: KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES
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+ :Architectures: arm64
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+ :Type: vm ioctl
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+ :Parameters: struct reg_mask_range (in/out)
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+ :Returns: 0 on success, < 0 on error
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+
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+
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+ ::
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+
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+ #define KVM_ARM_FEATURE_ID_RANGE 0
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+ #define KVM_ARM_FEATURE_ID_RANGE_SIZE (3 * 8 * 8)
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+
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+ struct reg_mask_range {
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+ __u64 addr; /* Pointer to mask array */
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+ __u32 range; /* Requested range */
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+ __u32 reserved[13];
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+ };
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+
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+ This ioctl copies the writable masks for a selected range of registers to
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+ userspace.
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+
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+ The ``addr `` field is a pointer to the destination array where KVM copies
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+ the writable masks.
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+
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+ The ``range `` field indicates the requested range of registers.
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+ ``KVM_CHECK_EXTENSION `` for the ``KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES ``
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+ capability returns the supported ranges, expressed as a set of flags. Each
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+ flag's bit index represents a possible value for the ``range `` field.
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+ All other values are reserved for future use and KVM may return an error.
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+
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+ The ``reserved[13] `` array is reserved for future use and should be 0, or
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+ KVM may return an error.
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+
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+ KVM_ARM_FEATURE_ID_RANGE (0)
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+ ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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+
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+ The Feature ID range is defined as the AArch64 System register space with
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+ op0==3, op1=={0, 1, 3}, CRn==0, CRm=={0-7}, op2=={0-7}.
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+
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+ The mask returned array pointed to by ``addr `` is indexed by the macro
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+ ``ARM64_FEATURE_ID_RANGE_IDX(op0, op1, crn, crm, op2) ``, allowing userspace
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+ to know what fields can be changed for the system register described by
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+ ``op0, op1, crn, crm, op2 ``. KVM rejects ID register values that describe a
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+ superset of the features supported by the system.
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+
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5. The kvm_run structure
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========================
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