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ravitejaxjohnharr-intel
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drm/i915/gen11: Moving WAs to icl_gt_workarounds_init()
Bspec page says "Reset: BUS", Accordingly moving w/a's: Wa_1407352427,Wa_1406680159 to proper function icl_gt_workarounds_init() Which will resolve guc enabling error v2: - Previous patch rev2 was created by email client which caused the Build failure, This v2 is to resolve the previous broken series Reviewed-by: John Harrison <[email protected]> Signed-off-by: Raviteja Goud Talla <[email protected]> Signed-off-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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drivers/gpu/drm/i915/gt/intel_workarounds.c

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1224,6 +1224,15 @@ icl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
12241224
GAMT_CHKN_BIT_REG,
12251225
GAMT_CHKN_DISABLE_L3_COH_PIPE);
12261226

1227+
/* Wa_1407352427:icl,ehl */
1228+
wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
1229+
PSDUNIT_CLKGATE_DIS);
1230+
1231+
/* Wa_1406680159:icl,ehl */
1232+
wa_write_or(wal,
1233+
SUBSLICE_UNIT_LEVEL_CLKGATE,
1234+
GWUNIT_CLKGATE_DIS);
1235+
12271236
/* Wa_1607087056:icl,ehl,jsl */
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if (IS_ICELAKE(i915) ||
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IS_JSL_EHL_GRAPHICS_STEP(i915, STEP_A0, STEP_B0))
@@ -2269,15 +2278,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
22692278
wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE,
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VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);
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2272-
/* Wa_1407352427:icl,ehl */
2273-
wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
2274-
PSDUNIT_CLKGATE_DIS);
2275-
2276-
/* Wa_1406680159:icl,ehl */
2277-
wa_write_or(wal,
2278-
SUBSLICE_UNIT_LEVEL_CLKGATE,
2279-
GWUNIT_CLKGATE_DIS);
2280-
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/*
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* Wa_1408767742:icl[a2..forever],ehl[all]
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* Wa_1605460711:icl[a0..c0]

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