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/* Total number of controllers */
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#define CONTROLLERS_PER_LANE 5
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- /* Protocol Type parameters */
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- #define XPSGTR_TYPE_USB0 0 /* USB controller 0 */
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- #define XPSGTR_TYPE_USB1 1 /* USB controller 1 */
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- #define XPSGTR_TYPE_SATA_0 2 /* SATA controller lane 0 */
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- #define XPSGTR_TYPE_SATA_1 3 /* SATA controller lane 1 */
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- #define XPSGTR_TYPE_PCIE_0 4 /* PCIe controller lane 0 */
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- #define XPSGTR_TYPE_PCIE_1 5 /* PCIe controller lane 1 */
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- #define XPSGTR_TYPE_PCIE_2 6 /* PCIe controller lane 2 */
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- #define XPSGTR_TYPE_PCIE_3 7 /* PCIe controller lane 3 */
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- #define XPSGTR_TYPE_DP_0 8 /* Display Port controller lane 0 */
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- #define XPSGTR_TYPE_DP_1 9 /* Display Port controller lane 1 */
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- #define XPSGTR_TYPE_SGMII0 10 /* Ethernet SGMII controller 0 */
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- #define XPSGTR_TYPE_SGMII1 11 /* Ethernet SGMII controller 1 */
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- #define XPSGTR_TYPE_SGMII2 12 /* Ethernet SGMII controller 2 */
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- #define XPSGTR_TYPE_SGMII3 13 /* Ethernet SGMII controller 3 */
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-
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/* Timeout values */
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#define TIMEOUT_US 1000
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@@ -185,7 +169,8 @@ struct xpsgtr_ssc {
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/**
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* struct xpsgtr_phy - representation of a lane
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* @phy: pointer to the kernel PHY device
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- * @type: controller which uses this lane
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+ * @instance: instance of the protocol type (such as the lane within a
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+ * protocol, or the USB/Ethernet controller)
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* @lane: lane number
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* @protocol: protocol in which the lane operates
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* @skip_phy_init: skip phy_init() if true
@@ -194,7 +179,7 @@ struct xpsgtr_ssc {
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*/
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struct xpsgtr_phy {
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struct phy * phy ;
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- u8 type ;
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+ u8 instance ;
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u8 lane ;
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u8 protocol ;
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bool skip_phy_init ;
@@ -331,8 +316,8 @@ static int xpsgtr_wait_pll_lock(struct phy *phy)
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if (ret == - ETIMEDOUT )
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dev_err (gtr_dev -> dev ,
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- "lane %u (type %u, protocol %u): PLL lock timeout\n" ,
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- gtr_phy -> lane , gtr_phy -> type , gtr_phy -> protocol );
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+ "lane %u (protocol %u, instance %u): PLL lock timeout\n" ,
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+ gtr_phy -> lane , gtr_phy -> protocol , gtr_phy -> instance );
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return ret ;
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}
@@ -645,8 +630,7 @@ static int xpsgtr_phy_power_on(struct phy *phy)
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* cumulating waits for both lanes. The user is expected to initialize
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* lane 0 last.
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*/
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- if (gtr_phy -> protocol != ICM_PROTOCOL_DP ||
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- gtr_phy -> type == XPSGTR_TYPE_DP_0 )
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+ if (gtr_phy -> protocol != ICM_PROTOCOL_DP || !gtr_phy -> instance )
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ret = xpsgtr_wait_pll_lock (phy );
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return ret ;
@@ -676,96 +660,59 @@ static const struct phy_ops xpsgtr_phyops = {
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* OF Xlate Support
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*/
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- /* Set the lane type and protocol based on the PHY type and instance number. */
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+ /* Set the lane protocol and instance based on the PHY type and instance number. */
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static int xpsgtr_set_lane_type (struct xpsgtr_phy * gtr_phy , u8 phy_type ,
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unsigned int phy_instance )
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{
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unsigned int num_phy_types ;
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- const int * phy_types ;
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switch (phy_type ) {
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- case PHY_TYPE_SATA : {
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- static const int types [] = {
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- XPSGTR_TYPE_SATA_0 ,
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- XPSGTR_TYPE_SATA_1 ,
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- };
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-
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- phy_types = types ;
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- num_phy_types = ARRAY_SIZE (types );
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+ case PHY_TYPE_SATA :
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+ num_phy_types = 2 ;
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gtr_phy -> protocol = ICM_PROTOCOL_SATA ;
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break ;
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- }
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- case PHY_TYPE_USB3 : {
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- static const int types [] = {
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- XPSGTR_TYPE_USB0 ,
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- XPSGTR_TYPE_USB1 ,
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- };
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-
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- phy_types = types ;
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- num_phy_types = ARRAY_SIZE (types );
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+ case PHY_TYPE_USB3 :
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+ num_phy_types = 2 ;
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gtr_phy -> protocol = ICM_PROTOCOL_USB ;
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break ;
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- }
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- case PHY_TYPE_DP : {
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- static const int types [] = {
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- XPSGTR_TYPE_DP_0 ,
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- XPSGTR_TYPE_DP_1 ,
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- };
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-
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- phy_types = types ;
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- num_phy_types = ARRAY_SIZE (types );
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+ case PHY_TYPE_DP :
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+ num_phy_types = 2 ;
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gtr_phy -> protocol = ICM_PROTOCOL_DP ;
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break ;
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- }
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- case PHY_TYPE_PCIE : {
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- static const int types [] = {
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- XPSGTR_TYPE_PCIE_0 ,
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- XPSGTR_TYPE_PCIE_1 ,
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- XPSGTR_TYPE_PCIE_2 ,
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- XPSGTR_TYPE_PCIE_3 ,
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- };
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-
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- phy_types = types ;
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- num_phy_types = ARRAY_SIZE (types );
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+ case PHY_TYPE_PCIE :
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+ num_phy_types = 4 ;
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gtr_phy -> protocol = ICM_PROTOCOL_PCIE ;
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break ;
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- }
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- case PHY_TYPE_SGMII : {
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- static const int types [] = {
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- XPSGTR_TYPE_SGMII0 ,
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- XPSGTR_TYPE_SGMII1 ,
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- XPSGTR_TYPE_SGMII2 ,
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- XPSGTR_TYPE_SGMII3 ,
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- };
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-
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- phy_types = types ;
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- num_phy_types = ARRAY_SIZE (types );
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+ case PHY_TYPE_SGMII :
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+ num_phy_types = 4 ;
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gtr_phy -> protocol = ICM_PROTOCOL_SGMII ;
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break ;
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- }
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default :
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return - EINVAL ;
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}
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if (phy_instance >= num_phy_types )
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return - EINVAL ;
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- gtr_phy -> type = phy_types [ phy_instance ] ;
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+ gtr_phy -> instance = phy_instance ;
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return 0 ;
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}
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/*
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- * Valid combinations of controllers and lanes (Interconnect Matrix).
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+ * Valid combinations of controllers and lanes (Interconnect Matrix). Each
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+ * "instance" represents one controller for a lane. For PCIe and DP, the
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+ * "instance" is the logical lane in the link. For SATA, USB, and SGMII,
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+ * the instance is the index of the controller.
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+ *
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+ * This information is only used to validate the devicetree reference, and is
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+ * not used when programming the hardware.
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*/
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static const unsigned int icm_matrix [NUM_LANES ][CONTROLLERS_PER_LANE ] = {
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- { XPSGTR_TYPE_PCIE_0 , XPSGTR_TYPE_SATA_0 , XPSGTR_TYPE_USB0 ,
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- XPSGTR_TYPE_DP_1 , XPSGTR_TYPE_SGMII0 },
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- { XPSGTR_TYPE_PCIE_1 , XPSGTR_TYPE_SATA_1 , XPSGTR_TYPE_USB0 ,
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- XPSGTR_TYPE_DP_0 , XPSGTR_TYPE_SGMII1 },
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- { XPSGTR_TYPE_PCIE_2 , XPSGTR_TYPE_SATA_0 , XPSGTR_TYPE_USB0 ,
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- XPSGTR_TYPE_DP_1 , XPSGTR_TYPE_SGMII2 },
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- { XPSGTR_TYPE_PCIE_3 , XPSGTR_TYPE_SATA_1 , XPSGTR_TYPE_USB1 ,
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- XPSGTR_TYPE_DP_0 , XPSGTR_TYPE_SGMII3 }
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+ /* PCIe, SATA, USB, DP, SGMII */
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+ { 0 , 0 , 0 , 1 , 0 }, /* Lane 0 */
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+ { 1 , 1 , 0 , 0 , 1 }, /* Lane 1 */
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+ { 2 , 0 , 0 , 1 , 2 }, /* Lane 2 */
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+ { 3 , 1 , 1 , 0 , 3 }, /* Lane 3 */
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};
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/* Translate OF phandle and args to PHY instance. */
@@ -820,7 +767,7 @@ static struct phy *xpsgtr_xlate(struct device *dev,
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* is allowed to operate on the lane.
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*/
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for (i = 0 ; i < CONTROLLERS_PER_LANE ; i ++ ) {
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- if (icm_matrix [phy_lane ][i ] == gtr_phy -> type )
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+ if (icm_matrix [phy_lane ][i ] == gtr_phy -> instance )
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return gtr_phy -> phy ;
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}
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