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Merge drm/drm-next into drm-intel-next
Sync up with changes from drm-intel-gt-next. Signed-off-by: Jani Nikula <[email protected]>
2 parents 0976b3d + ba57b9b commit 69f06e4

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.mailmap

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@@ -327,6 +327,7 @@ Mauro Carvalho Chehab <[email protected]> <[email protected]>
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Mauro Carvalho Chehab <[email protected]> <[email protected]>
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Maxim Mikityanskiy <[email protected]> <[email protected]>
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Maxim Mikityanskiy <[email protected]> <[email protected]>
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Mayuresh Janorkar <[email protected]>
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2020 BayLibre, SAS
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/amlogic,meson-g12a-dw-mipi-dsi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic specific extensions to the Synopsys Designware MIPI DSI Host Controller
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maintainers:
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- Neil Armstrong <[email protected]>
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description: |
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The Amlogic Meson Synopsys Designware Integration is composed of
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- A Synopsys DesignWare MIPI DSI Host Controller IP
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- A TOP control block controlling the Clocks & Resets of the IP
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allOf:
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- $ref: dsi-controller.yaml#
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properties:
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compatible:
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enum:
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- amlogic,meson-g12a-dw-mipi-dsi
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reg:
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maxItems: 1
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clocks:
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minItems: 3
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maxItems: 4
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clock-names:
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minItems: 3
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items:
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- const: pclk
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- const: bit
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- const: px
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- const: meas
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resets:
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maxItems: 1
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reset-names:
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items:
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- const: top
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phys:
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maxItems: 1
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phy-names:
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items:
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- const: dphy
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/properties/port
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description: Input node to receive pixel data.
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description: DSI output node to panel.
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required:
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- port@0
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- port@1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- resets
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- reset-names
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- phys
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- phy-names
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- ports
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unevaluatedProperties: false
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examples:
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- |
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dsi@6000 {
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compatible = "amlogic,meson-g12a-dw-mipi-dsi";
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reg = <0x6000 0x400>;
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resets = <&reset_top>;
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reset-names = "top";
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clocks = <&clk_pclk>, <&bit_clk>, <&clk_px>;
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clock-names = "pclk", "bit", "px";
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phys = <&mipi_dphy>;
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phy-names = "dphy";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* VPU VENC Input */
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mipi_dsi_venc_port: port@0 {
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reg = <0>;
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mipi_dsi_in: endpoint {
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remote-endpoint = <&dpi_out>;
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};
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};
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/* DSI Output */
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mipi_dsi_panel_port: port@1 {
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reg = <1>;
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mipi_out_panel: endpoint {
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remote-endpoint = <&mipi_in_panel>;
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};
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};
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};
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};

Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml

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description:
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A port node pointing to the HDMI-TX port node.
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port@2:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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A port node pointing to the DPI port node (e.g. DSI or LVDS transceiver).
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"#address-cells":
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const: 1
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Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml

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samsung,burst-clock-frequency:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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DSIM high speed burst mode frequency.
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DSIM high speed burst mode frequency. If absent,
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the pixel clock from the attached device or bridge
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will be used instead.
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samsung,esc-clock-frequency:
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$ref: /schemas/types.yaml#/definitions/uint32
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samsung,pll-clock-frequency:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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DSIM oscillator clock frequency.
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DSIM oscillator clock frequency. If absent, the clock frequency
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of sclk_mipi will be used instead.
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phys:
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maxItems: 1
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specified.
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description:
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DSI output port node to the panel or the next bridge
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in the chain.
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- compatible
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- interrupts
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- reg
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- samsung,burst-clock-frequency
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- samsung,esc-clock-frequency
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- samsung,pll-clock-frequency
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allOf:
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- $ref: ../dsi-controller.yaml#

Documentation/devicetree/bindings/display/bridge/toshiba,tc358762.yaml

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maxItems: 1
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description: virtual channel number of a DSI peripheral
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reset-gpios:
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maxItems: 1
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vddc-supply:
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description: Regulator for 1.2V internal core power.
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Documentation/devicetree/bindings/display/connector/hdmi-connector.yaml

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description: GPIO signal to enable DDC bus
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maxItems: 1
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hdmi-pwr-supply:
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description: Power supply for the HDMI +5V Power pin
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port:
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$ref: /schemas/graph.yaml#/properties/port
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description: Connection to controller providing HDMI signals

Documentation/devicetree/bindings/display/fsl,lcdif.yaml

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- fsl,imx28-lcdif
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- fsl,imx6sx-lcdif
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- fsl,imx8mp-lcdif
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- fsl,imx93-lcdif
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- items:
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- enum:
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- fsl,imx6sl-lcdif
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properties:
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compatible:
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contains:
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const: fsl,imx8mp-lcdif
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enum:
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- fsl,imx8mp-lcdif
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- fsl,imx93-lcdif
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then:
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properties:
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clocks:
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enum:
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- fsl,imx6sx-lcdif
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- fsl,imx8mp-lcdif
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- fsl,imx93-lcdif
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then:
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properties:
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clocks:
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- fsl,imx8mm-lcdif
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- fsl,imx8mn-lcdif
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- fsl,imx8mp-lcdif
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- fsl,imx93-lcdif
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then:
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required:
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- power-domains

Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml

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- innolux,hj110iz-01a
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# STARRY 2081101QFH032011-53G 10.1" WUXGA TFT LCD panel
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- starry,2081101qfh032011-53g
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# STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
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- starry,himax83102-j02
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# STARRY ili9882t 10.51" WUXGA TFT LCD panel
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- starry,ili9882t
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reg:
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description: the virtual channel number of a DSI peripheral

Documentation/devicetree/bindings/display/panel/panel-simple.yaml

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- ampire,am-1280800n3tzqw-t00h
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# Ampire AM-480272H3TMQW-T01H 4.3" WQVGA TFT LCD panel
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- ampire,am-480272h3tmqw-t01h
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# Ampire AM-800480L1TMQW-T00H 5" WVGA TFT LCD panel
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- ampire,am-800480l1tmqw-t00h
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# Ampire AM-800480R3TMQW-A1H 7.0" WVGA TFT LCD panel
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- ampire,am800480r3tmqwa1h
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# Ampire AM-800600P5TMQW-TB8H 8.0" SVGA TFT LCD panel
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- rocktech,rk101ii01d-ct
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# Rocktech Display Ltd. RK070ER9427 800(RGB)x480 TFT LCD panel
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- rocktech,rk070er9427
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# Rocktech Display Ltd. RK043FN48H 4.3" 480x272 LCD-TFT panel
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- rocktech,rk043fn48h
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# Samsung 13.3" FHD (1920x1080 pixels) eDP AMOLED panel
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- samsung,atna33xc20
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# Samsung 12.2" (2560x1600 pixels) TFT LCD panel

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