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| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/media/renesas,vsp1.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: Renesas VSP Video Processing Engine |
| 8 | + |
| 9 | +maintainers: |
| 10 | + - Laurent Pinchart <[email protected]> |
| 11 | + |
| 12 | +description: |
| 13 | + The VSP is a video processing engine that supports up-/down-scaling, alpha |
| 14 | + blending, color space conversion and various other image processing features. |
| 15 | + It can be found in the Renesas R-Car Gen2, R-Car Gen3, RZ/G1, and RZ/G2 SoCs. |
| 16 | + |
| 17 | +properties: |
| 18 | + compatible: |
| 19 | + enum: |
| 20 | + - renesas,vsp1 # R-Car Gen2 and RZ/G1 |
| 21 | + - renesas,vsp2 # R-Car Gen3 and RZ/G2 |
| 22 | + |
| 23 | + reg: |
| 24 | + maxItems: 1 |
| 25 | + |
| 26 | + interrupts: |
| 27 | + maxItems: 1 |
| 28 | + |
| 29 | + clocks: |
| 30 | + maxItems: 1 |
| 31 | + |
| 32 | + renesas,fcp: |
| 33 | + $ref: /schemas/types.yaml#/definitions/phandle |
| 34 | + description: |
| 35 | + A phandle referencing the FCP that handles memory accesses for the VSP. |
| 36 | + |
| 37 | +required: |
| 38 | + - compatible |
| 39 | + - reg |
| 40 | + - interrupts |
| 41 | + - clocks |
| 42 | + |
| 43 | +additionalProperties: false |
| 44 | + |
| 45 | +if: |
| 46 | + properties: |
| 47 | + compatible: |
| 48 | + items: |
| 49 | + - const: renesas,vsp1 |
| 50 | +then: |
| 51 | + properties: |
| 52 | + renesas,fcp: false |
| 53 | +else: |
| 54 | + required: |
| 55 | + - renesas,fcp |
| 56 | + |
| 57 | +examples: |
| 58 | + # R8A7790 (R-Car H2) VSP1-S |
| 59 | + - | |
| 60 | + #include <dt-bindings/clock/renesas-cpg-mssr.h> |
| 61 | + #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 62 | +
|
| 63 | + vsp@fe928000 { |
| 64 | + compatible = "renesas,vsp1"; |
| 65 | + reg = <0xfe928000 0x8000>; |
| 66 | + interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; |
| 67 | + clocks = <&cpg CPG_MOD 131>; |
| 68 | + }; |
| 69 | +
|
| 70 | + # R8A77951 (R-Car H3) VSP2-BC |
| 71 | + - | |
| 72 | + #include <dt-bindings/clock/renesas-cpg-mssr.h> |
| 73 | + #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 74 | +
|
| 75 | + vsp@fe920000 { |
| 76 | + compatible = "renesas,vsp2"; |
| 77 | + reg = <0xfe920000 0x8000>; |
| 78 | + interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; |
| 79 | + clocks = <&cpg CPG_MOD 624>; |
| 80 | +
|
| 81 | + renesas,fcp = <&fcpvb1>; |
| 82 | + }; |
| 83 | +... |
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