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arm64: dts: qcom: msm8953: Add interconnects
Add the nodes for the bimc, pcnoc, snoc and snoc_mm. And wire up the interconnects where applicable. Signed-off-by: Vladimir Lypak <[email protected]> [luca: Prepare patch for upstream submission] Signed-off-by: Luca Weiss <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
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‎arch/arm64/boot/dts/qcom/msm8953.dtsi

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@@ -5,6 +5,8 @@
55
#include <dt-bindings/clock/qcom,gcc-msm8953.h>
66
#include <dt-bindings/clock/qcom,rpmcc.h>
77
#include <dt-bindings/gpio/gpio.h>
8+
#include <dt-bindings/interconnect/qcom,msm8953.h>
9+
#include <dt-bindings/interconnect/qcom,rpm-icc.h>
810
#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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#include <dt-bindings/soc/qcom,apr.h>
@@ -45,6 +47,8 @@
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reg = <0x0>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
50+
interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
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&bimc SLV_EBI RPM_ACTIVE_TAG>;
4852
next-level-cache = <&l2_0>;
4953
#cooling-cells = <2>;
5054
};
@@ -55,6 +59,8 @@
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reg = <0x1>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
63+
&bimc SLV_EBI RPM_ACTIVE_TAG>;
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next-level-cache = <&l2_0>;
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#cooling-cells = <2>;
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};
@@ -65,6 +71,8 @@
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reg = <0x2>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
75+
&bimc SLV_EBI RPM_ACTIVE_TAG>;
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next-level-cache = <&l2_0>;
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#cooling-cells = <2>;
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};
@@ -75,6 +83,8 @@
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reg = <0x3>;
7684
enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
87+
&bimc SLV_EBI RPM_ACTIVE_TAG>;
7888
next-level-cache = <&l2_0>;
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#cooling-cells = <2>;
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};
@@ -85,6 +95,8 @@
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reg = <0x100>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
99+
&bimc SLV_EBI RPM_ACTIVE_TAG>;
88100
next-level-cache = <&l2_1>;
89101
#cooling-cells = <2>;
90102
};
@@ -95,6 +107,8 @@
95107
reg = <0x101>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
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&bimc SLV_EBI RPM_ACTIVE_TAG>;
98112
next-level-cache = <&l2_1>;
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#cooling-cells = <2>;
100114
};
@@ -105,6 +119,8 @@
105119
reg = <0x102>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
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&bimc SLV_EBI RPM_ACTIVE_TAG>;
108124
next-level-cache = <&l2_1>;
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#cooling-cells = <2>;
110126
};
@@ -115,6 +131,8 @@
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reg = <0x103>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
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&bimc SLV_EBI RPM_ACTIVE_TAG>;
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next-level-cache = <&l2_1>;
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#cooling-cells = <2>;
120138
};
@@ -471,6 +489,13 @@
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clock-names = "core";
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};
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492+
bimc: interconnect@400000 {
493+
compatible = "qcom,msm8953-bimc";
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reg = <0x00400000 0x5a000>;
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496+
#interconnect-cells = <2>;
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};
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474499
tsens0: thermal-sensor@4a9000 {
475500
compatible = "qcom,msm8953-tsens", "qcom,tsens-v2";
476501
reg = <0x004a9000 0x1000>, /* TM */
@@ -487,6 +512,29 @@
487512
reg = <0x004ab000 0x4>;
488513
};
489514

515+
pcnoc: interconnect@500000 {
516+
compatible = "qcom,msm8953-pcnoc";
517+
reg = <0x00500000 0x12080>;
518+
519+
clocks = <&gcc GCC_PCNOC_USB3_AXI_CLK>;
520+
clock-names = "pcnoc_usb3_axi";
521+
522+
#interconnect-cells = <2>;
523+
};
524+
525+
snoc: interconnect@580000 {
526+
compatible = "qcom,msm8953-snoc";
527+
reg = <0x00580000 0x16080>;
528+
529+
#interconnect-cells = <2>;
530+
531+
snoc_mm: interconnect-snoc {
532+
compatible = "qcom,msm8953-snoc-mm";
533+
534+
#interconnect-cells = <2>;
535+
};
536+
};
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490538
tlmm: pinctrl@1000000 {
491539
compatible = "qcom,msm8953-pinctrl";
492540
reg = <0x01000000 0x300000>;
@@ -864,6 +912,13 @@
864912
interrupt-controller;
865913
#interrupt-cells = <1>;
866914

915+
interconnects = <&snoc_mm MAS_MDP RPM_ALWAYS_TAG
916+
&bimc SLV_EBI RPM_ALWAYS_TAG>,
917+
<&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
918+
&pcnoc SLV_DISP_SS_CFG RPM_ACTIVE_TAG>;
919+
interconnect-names = "mdp0-mem",
920+
"cpu-cfg";
921+
867922
clocks = <&gcc GCC_MDSS_AHB_CLK>,
868923
<&gcc GCC_MDSS_AXI_CLK>,
869924
<&gcc GCC_MDSS_VSYNC_CLK>,
@@ -1080,6 +1135,11 @@
10801135
"alwayson";
10811136
power-domains = <&gcc OXILI_GX_GDSC>;
10821137

1138+
interconnects = <&bimc MAS_OXILI RPM_ALWAYS_TAG
1139+
&bimc SLV_EBI RPM_ALWAYS_TAG>,
1140+
<&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
1141+
&pcnoc SLV_GPU_CFG RPM_ACTIVE_TAG>;
1142+
10831143
iommus = <&gpu_iommu 0>;
10841144
operating-points-v2 = <&gpu_opp_table>;
10851145

@@ -1317,6 +1377,13 @@
13171377
<&gcc GCC_USB30_MASTER_CLK>;
13181378
assigned-clock-rates = <19200000>, <133330000>;
13191379

1380+
interconnects = <&pcnoc MAS_USB3 RPM_ALWAYS_TAG
1381+
&bimc SLV_EBI RPM_ALWAYS_TAG>,
1382+
<&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
1383+
&pcnoc SLV_USB3 RPM_ACTIVE_TAG>;
1384+
interconnect-names = "usb-ddr",
1385+
"apps-usb";
1386+
13201387
power-domains = <&gcc USB30_GDSC>;
13211388

13221389
qcom,select-utmi-as-pipe-clk;
@@ -1369,6 +1436,13 @@
13691436
<&rpmcc RPM_SMD_XO_CLK_SRC>;
13701437
clock-names = "iface", "core", "xo";
13711438

1439+
interconnects = <&pcnoc MAS_SDCC_1 RPM_ALWAYS_TAG
1440+
&bimc SLV_EBI RPM_ALWAYS_TAG>,
1441+
<&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
1442+
&pcnoc SLV_SDCC_1 RPM_ACTIVE_TAG>;
1443+
interconnect-names = "sdhc-ddr",
1444+
"cpu-sdhc";
1445+
13721446
power-domains = <&rpmpd MSM8953_VDDCX>;
13731447
operating-points-v2 = <&sdhc1_opp_table>;
13741448

@@ -1389,26 +1463,36 @@
13891463

13901464
opp-25000000 {
13911465
opp-hz = /bits/ 64 <25000000>;
1466+
opp-peak-kBps = <200000>, <100000>;
1467+
opp-avg-kBps = <65360>, <32768>;
13921468
required-opps = <&rpmpd_opp_low_svs>;
13931469
};
13941470

13951471
opp-50000000 {
13961472
opp-hz = /bits/ 64 <50000000>;
1473+
opp-peak-kBps = <400000>, <200000>;
1474+
opp-avg-kBps = <130718>, <65360>;
13971475
required-opps = <&rpmpd_opp_svs>;
13981476
};
13991477

14001478
opp-100000000 {
14011479
opp-hz = /bits/ 64 <100000000>;
1480+
opp-peak-kBps = <400000>, <400000>;
1481+
opp-avg-kBps = <130718>, <65360>;
14021482
required-opps = <&rpmpd_opp_svs>;
14031483
};
14041484

14051485
opp-192000000 {
14061486
opp-hz = /bits/ 64 <192000000>;
1487+
opp-peak-kBps = <800000>, <600000>;
1488+
opp-avg-kBps = <261438>, <130718>;
14071489
required-opps = <&rpmpd_opp_nom>;
14081490
};
14091491

14101492
opp-384000000 {
14111493
opp-hz = /bits/ 64 <384000000>;
1494+
opp-peak-kBps = <800000>, <800000>;
1495+
opp-avg-kBps = <261438>, <300000>;
14121496
required-opps = <&rpmpd_opp_nom>;
14131497
};
14141498
};
@@ -1429,6 +1513,13 @@
14291513
<&rpmcc RPM_SMD_XO_CLK_SRC>;
14301514
clock-names = "iface", "core", "xo";
14311515

1516+
interconnects = <&pcnoc MAS_SDCC_2 RPM_ALWAYS_TAG
1517+
&bimc SLV_EBI RPM_ALWAYS_TAG>,
1518+
<&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
1519+
&pcnoc SLV_SDCC_2 RPM_ACTIVE_TAG>;
1520+
interconnect-names = "sdhc-ddr",
1521+
"cpu-sdhc";
1522+
14321523
power-domains = <&rpmpd MSM8953_VDDCX>;
14331524
operating-points-v2 = <&sdhc2_opp_table>;
14341525

@@ -1445,26 +1536,36 @@
14451536

14461537
opp-25000000 {
14471538
opp-hz = /bits/ 64 <25000000>;
1539+
opp-peak-kBps = <200000>, <100000>;
1540+
opp-avg-kBps = <65360>, <32768>;
14481541
required-opps = <&rpmpd_opp_low_svs>;
14491542
};
14501543

14511544
opp-50000000 {
14521545
opp-hz = /bits/ 64 <50000000>;
1546+
opp-peak-kBps = <400000>, <400000>;
1547+
opp-avg-kBps = <130718>, <65360>;
14531548
required-opps = <&rpmpd_opp_svs>;
14541549
};
14551550

14561551
opp-100000000 {
14571552
opp-hz = /bits/ 64 <100000000>;
1553+
opp-peak-kBps = <800000>, <400000>;
1554+
opp-avg-kBps = <130718>, <130718>;
14581555
required-opps = <&rpmpd_opp_svs>;
14591556
};
14601557

14611558
opp-177770000 {
14621559
opp-hz = /bits/ 64 <177770000>;
1560+
opp-peak-kBps = <600000>, <600000>;
1561+
opp-avg-kBps = <261438>, <130718>;
14631562
required-opps = <&rpmpd_opp_nom>;
14641563
};
14651564

14661565
opp-200000000 {
14671566
opp-hz = /bits/ 64 <200000000>;
1567+
opp-peak-kBps = <800000>, <800000>;
1568+
opp-avg-kBps = <261438>, <130718>;
14681569
required-opps = <&rpmpd_opp_nom>;
14691570
};
14701571
};

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