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riscv: dts: microchip: add missing CAN bus clocks
The CAN controller on PolarFire SoC has an AHB peripheral clock _and_ a CAN bus clock. The bus clock was omitted when the binding was written, but is required for operation. Make up for lost time and add to the DT. Fixes: 38a71fc ("riscv: dts: microchip: add mpfs's CAN controllers") Signed-off-by: Conor Dooley <[email protected]>
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arch/riscv/boot/dts/microchip/mpfs.dtsi

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -422,7 +422,7 @@
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can0: can@2010c000 {
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compatible = "microchip,mpfs-can";
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reg = <0x0 0x2010c000 0x0 0x1000>;
425-
clocks = <&clkcfg CLK_CAN0>;
425+
clocks = <&clkcfg CLK_CAN0>, <&clkcfg CLK_MSSPLL3>;
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interrupt-parent = <&plic>;
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interrupts = <56>;
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status = "disabled";
@@ -431,7 +431,7 @@
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can1: can@2010d000 {
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compatible = "microchip,mpfs-can";
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reg = <0x0 0x2010d000 0x0 0x1000>;
434-
clocks = <&clkcfg CLK_CAN1>;
434+
clocks = <&clkcfg CLK_CAN1>, <&clkcfg CLK_MSSPLL3>;
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interrupt-parent = <&plic>;
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interrupts = <57>;
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status = "disabled";

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