Skip to content

Commit 6d011d5

Browse files
mkumardtiwai
authored andcommitted
ALSA: hda: Clear RIRB status before reading WP
RIRB interrupt status getting cleared after the write pointer is read causes a race condition, where last response(s) into RIRB may remain unserviced by IRQ, eventually causing azx_rirb_get_response to fall back to polling mode. Clearing the RIRB interrupt status ahead of write pointer access ensures that this condition is avoided. Signed-off-by: Mohan Kumar <[email protected]> Signed-off-by: Viswanath L <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
1 parent f2adbae commit 6d011d5

File tree

1 file changed

+9
-2
lines changed

1 file changed

+9
-2
lines changed

sound/pci/hda/hda_controller.c

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1110,16 +1110,23 @@ irqreturn_t azx_interrupt(int irq, void *dev_id)
11101110
if (snd_hdac_bus_handle_stream_irq(bus, status, stream_update))
11111111
active = true;
11121112

1113-
/* clear rirb int */
11141113
status = azx_readb(chip, RIRBSTS);
11151114
if (status & RIRB_INT_MASK) {
1115+
/*
1116+
* Clearing the interrupt status here ensures that no
1117+
* interrupt gets masked after the RIRB wp is read in
1118+
* snd_hdac_bus_update_rirb. This avoids a possible
1119+
* race condition where codec response in RIRB may
1120+
* remain unserviced by IRQ, eventually falling back
1121+
* to polling mode in azx_rirb_get_response.
1122+
*/
1123+
azx_writeb(chip, RIRBSTS, RIRB_INT_MASK);
11161124
active = true;
11171125
if (status & RIRB_INT_RESPONSE) {
11181126
if (chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND)
11191127
udelay(80);
11201128
snd_hdac_bus_update_rirb(bus);
11211129
}
1122-
azx_writeb(chip, RIRBSTS, RIRB_INT_MASK);
11231130
}
11241131
} while (active && ++repeat < 10);
11251132

0 commit comments

Comments
 (0)