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| 1 | +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) |
| 2 | + |
| 3 | +/dts-v1/; |
| 4 | +#include <dt-bindings/gpio/gpio.h> |
| 5 | +#include <dt-bindings/input/input.h> |
| 6 | +#include "armada-372x.dtsi" |
| 7 | + |
| 8 | +/ { |
| 9 | + model = "GL.iNet GL-MV1000"; |
| 10 | + compatible = "glinet,gl-mv1000", "marvell,armada3720"; |
| 11 | + |
| 12 | + aliases { |
| 13 | + led-boot = &led_power; |
| 14 | + led-failsafe = &led_power; |
| 15 | + led-running = &led_power; |
| 16 | + led-upgrade = &led_power; |
| 17 | + }; |
| 18 | + |
| 19 | + chosen { |
| 20 | + stdout-path = "serial0:115200n8"; |
| 21 | + }; |
| 22 | + |
| 23 | + memory@0 { |
| 24 | + device_type = "memory"; |
| 25 | + reg = <0x00000000 0x00000000 0x00000000 0x20000000>; |
| 26 | + }; |
| 27 | + |
| 28 | + vcc_sd_reg1: regulator { |
| 29 | + compatible = "regulator-gpio"; |
| 30 | + regulator-name = "vcc_sd1"; |
| 31 | + regulator-min-microvolt = <1800000>; |
| 32 | + regulator-max-microvolt = <3300000>; |
| 33 | + regulator-boot-on; |
| 34 | + |
| 35 | + gpios-states = <0>; |
| 36 | + states = <1800000 0x1 |
| 37 | + 3300000 0x0>; |
| 38 | + enable-active-high; |
| 39 | + }; |
| 40 | + |
| 41 | + keys { |
| 42 | + compatible = "gpio-keys"; |
| 43 | + |
| 44 | + reset { |
| 45 | + label = "reset"; |
| 46 | + linux,code = <KEY_RESTART>; |
| 47 | + gpios = <&gpionb 14 GPIO_ACTIVE_LOW>; |
| 48 | + }; |
| 49 | + |
| 50 | + switch { |
| 51 | + label = "switch"; |
| 52 | + linux,code = <BTN_0>; |
| 53 | + gpios = <&gpiosb 22 GPIO_ACTIVE_LOW>; |
| 54 | + }; |
| 55 | + }; |
| 56 | + |
| 57 | + leds { |
| 58 | + compatible = "gpio-leds"; |
| 59 | + |
| 60 | + vpn { |
| 61 | + label = "green:vpn"; |
| 62 | + gpios = <&gpionb 11 GPIO_ACTIVE_LOW>; |
| 63 | + }; |
| 64 | + |
| 65 | + wan { |
| 66 | + label = "green:wan"; |
| 67 | + gpios = <&gpionb 12 GPIO_ACTIVE_LOW>; |
| 68 | + }; |
| 69 | + |
| 70 | + led_power: power { |
| 71 | + label = "green:power"; |
| 72 | + gpios = <&gpionb 13 GPIO_ACTIVE_LOW>; |
| 73 | + default-state = "on"; |
| 74 | + }; |
| 75 | + }; |
| 76 | +}; |
| 77 | + |
| 78 | +&spi0 { |
| 79 | + status = "okay"; |
| 80 | + |
| 81 | + flash@0 { |
| 82 | + reg = <0>; |
| 83 | + compatible = "jedec,spi-nor"; |
| 84 | + spi-max-frequency = <104000000>; |
| 85 | + m25p,fast-read; |
| 86 | + partitions { |
| 87 | + compatible = "fixed-partitions"; |
| 88 | + #address-cells = <1>; |
| 89 | + #size-cells = <1>; |
| 90 | + |
| 91 | + partition@0 { |
| 92 | + label = "firmware"; |
| 93 | + reg = <0 0xf0000>; |
| 94 | + }; |
| 95 | + |
| 96 | + partition@f0000 { |
| 97 | + label = "u-boot-env"; |
| 98 | + reg = <0xf0000 0x8000>; |
| 99 | + }; |
| 100 | + |
| 101 | + factory: partition@f8000 { |
| 102 | + label = "factory"; |
| 103 | + reg = <0xf8000 0x8000>; |
| 104 | + read-only; |
| 105 | + }; |
| 106 | + |
| 107 | + partition@100000 { |
| 108 | + label = "dtb"; |
| 109 | + reg = <0x100000 0x10000>; |
| 110 | + read-only; |
| 111 | + }; |
| 112 | + |
| 113 | + partition@110000 { |
| 114 | + label = "rescue"; |
| 115 | + reg = <0x110000 0x1000000>; |
| 116 | + }; |
| 117 | + }; |
| 118 | + }; |
| 119 | +}; |
| 120 | + |
| 121 | +&sdhci1 { |
| 122 | + wp-inverted; |
| 123 | + bus-width = <4>; |
| 124 | + cd-gpios = <&gpionb 17 GPIO_ACTIVE_LOW>; |
| 125 | + marvell,pad-type = "sd"; |
| 126 | + no-1-8-v; |
| 127 | + vqmmc-supply = <&vcc_sd_reg1>; |
| 128 | + status = "okay"; |
| 129 | +}; |
| 130 | + |
| 131 | +&sdhci0 { |
| 132 | + bus-width = <8>; |
| 133 | + mmc-ddr-1_8v; |
| 134 | + mmc-hs400-1_8v; |
| 135 | + non-removable; |
| 136 | + no-sd; |
| 137 | + no-sdio; |
| 138 | + marvell,pad-type = "fixed-1-8v"; |
| 139 | + status = "okay"; |
| 140 | +}; |
| 141 | + |
| 142 | +&usb3 { |
| 143 | + status = "okay"; |
| 144 | +}; |
| 145 | + |
| 146 | +&usb2 { |
| 147 | + status = "okay"; |
| 148 | +}; |
| 149 | + |
| 150 | +&uart0 { |
| 151 | + status = "okay"; |
| 152 | +}; |
| 153 | + |
| 154 | +&mdio { |
| 155 | + switch0: switch0@1 { |
| 156 | + compatible = "marvell,mv88e6085"; |
| 157 | + #address-cells = <1>; |
| 158 | + #size-cells = <0>; |
| 159 | + reg = <1>; |
| 160 | + |
| 161 | + dsa,member = <0 0>; |
| 162 | + |
| 163 | + ports: ports { |
| 164 | + #address-cells = <1>; |
| 165 | + #size-cells = <0>; |
| 166 | + |
| 167 | + port@0 { |
| 168 | + reg = <0>; |
| 169 | + label = "cpu"; |
| 170 | + ethernet = <ð0>; |
| 171 | + }; |
| 172 | + |
| 173 | + port@1 { |
| 174 | + reg = <1>; |
| 175 | + label = "wan"; |
| 176 | + phy-handle = <&switch0phy0>; |
| 177 | + }; |
| 178 | + |
| 179 | + port@2 { |
| 180 | + reg = <2>; |
| 181 | + label = "lan0"; |
| 182 | + phy-handle = <&switch0phy1>; |
| 183 | + |
| 184 | + nvmem-cells = <&macaddr_factory_6>; |
| 185 | + nvmem-cell-names = "mac-address"; |
| 186 | + }; |
| 187 | + |
| 188 | + port@3 { |
| 189 | + reg = <3>; |
| 190 | + label = "lan1"; |
| 191 | + phy-handle = <&switch0phy2>; |
| 192 | + |
| 193 | + nvmem-cells = <&macaddr_factory_6>; |
| 194 | + nvmem-cell-names = "mac-address"; |
| 195 | + }; |
| 196 | + }; |
| 197 | + |
| 198 | + mdio { |
| 199 | + #address-cells = <1>; |
| 200 | + #size-cells = <0>; |
| 201 | + |
| 202 | + switch0phy0: switch0phy0@11 { |
| 203 | + reg = <0x11>; |
| 204 | + }; |
| 205 | + switch0phy1: switch0phy1@12 { |
| 206 | + reg = <0x12>; |
| 207 | + }; |
| 208 | + switch0phy2: switch0phy2@13 { |
| 209 | + reg = <0x13>; |
| 210 | + }; |
| 211 | + }; |
| 212 | + }; |
| 213 | +}; |
| 214 | + |
| 215 | +ð0 { |
| 216 | + nvmem-cells = <&macaddr_factory_0>; |
| 217 | + nvmem-cell-names = "mac-address"; |
| 218 | + phy-mode = "rgmii-id"; |
| 219 | + status = "okay"; |
| 220 | + |
| 221 | + fixed-link { |
| 222 | + speed = <1000>; |
| 223 | + full-duplex; |
| 224 | + }; |
| 225 | +}; |
| 226 | + |
| 227 | +&factory { |
| 228 | + compatible = "nvmem-cells"; |
| 229 | + #address-cells = <1>; |
| 230 | + #size-cells = <1>; |
| 231 | + |
| 232 | + macaddr_factory_0: macaddr@0 { |
| 233 | + reg = <0x0 0x6>; |
| 234 | + }; |
| 235 | + |
| 236 | + macaddr_factory_6: macaddr@6 { |
| 237 | + reg = <0x6 0x6>; |
| 238 | + }; |
| 239 | +}; |
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