@@ -1933,39 +1933,41 @@ static enum drm_connector_status mtk_dp_bdg_detect(struct drm_bridge *bridge)
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bool enabled = mtk_dp -> enabled ;
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u8 sink_count = 0 ;
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- if (mtk_dp -> train_info .cable_plugged_in ) {
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- if (!enabled ) {
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- /* power on aux */
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- mtk_dp_update_bits (mtk_dp , MTK_DP_TOP_PWR_STATE ,
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- DP_PWR_STATE_BANDGAP_TPLL_LANE ,
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- DP_PWR_STATE_MASK );
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-
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- /* power on panel */
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- drm_dp_dpcd_writeb (& mtk_dp -> aux , DP_SET_POWER , DP_SET_POWER_D0 );
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- usleep_range (2000 , 5000 );
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- }
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- /*
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- * Some dongles still source HPD when they do not connect to any
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- * sink device. To avoid this, we need to read the sink count
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- * to make sure we do connect to sink devices. After this detect
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- * function, we just need to check the HPD connection to check
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- * whether we connect to a sink device.
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- */
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- drm_dp_dpcd_readb (& mtk_dp -> aux , DP_SINK_COUNT , & sink_count );
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- if (DP_GET_SINK_COUNT (sink_count ))
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- ret = connector_status_connected ;
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-
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- if (!enabled ) {
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- /* power off panel */
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- drm_dp_dpcd_writeb (& mtk_dp -> aux , DP_SET_POWER , DP_SET_POWER_D3 );
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- usleep_range (2000 , 3000 );
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-
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- /* power off aux */
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- mtk_dp_update_bits (mtk_dp , MTK_DP_TOP_PWR_STATE ,
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- DP_PWR_STATE_BANDGAP_TPLL ,
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- DP_PWR_STATE_MASK );
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- }
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+ if (!mtk_dp -> train_info .cable_plugged_in )
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+ return ret ;
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+
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+ if (!enabled ) {
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+ /* power on aux */
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+ mtk_dp_update_bits (mtk_dp , MTK_DP_TOP_PWR_STATE ,
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+ DP_PWR_STATE_BANDGAP_TPLL_LANE ,
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+ DP_PWR_STATE_MASK );
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+
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+ /* power on panel */
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+ drm_dp_dpcd_writeb (& mtk_dp -> aux , DP_SET_POWER , DP_SET_POWER_D0 );
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+ usleep_range (2000 , 5000 );
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}
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+ /*
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+ * Some dongles still source HPD when they do not connect to any
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+ * sink device. To avoid this, we need to read the sink count
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+ * to make sure we do connect to sink devices. After this detect
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+ * function, we just need to check the HPD connection to check
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+ * whether we connect to a sink device.
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+ */
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+ drm_dp_dpcd_readb (& mtk_dp -> aux , DP_SINK_COUNT , & sink_count );
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+ if (DP_GET_SINK_COUNT (sink_count ))
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+ ret = connector_status_connected ;
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+
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+ if (!enabled ) {
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+ /* power off panel */
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+ drm_dp_dpcd_writeb (& mtk_dp -> aux , DP_SET_POWER , DP_SET_POWER_D3 );
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+ usleep_range (2000 , 3000 );
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+
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+ /* power off aux */
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+ mtk_dp_update_bits (mtk_dp , MTK_DP_TOP_PWR_STATE ,
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+ DP_PWR_STATE_BANDGAP_TPLL ,
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+ DP_PWR_STATE_MASK );
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+ }
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+
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return ret ;
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}
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