@@ -1288,11 +1288,11 @@ static inline void intel_idle_init_cstates_acpi(struct cpuidle_driver *drv) { }
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static inline bool intel_idle_off_by_default (u32 mwait_hint ) { return false; }
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#endif /* !CONFIG_ACPI_PROCESSOR_CSTATE */
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- /*
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- * ivt_idle_state_table_update(void)
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+ /**
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+ * ivt_idle_state_table_update - Tune the idle states table for Ivy Town.
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*
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- * Tune IVT multi-socket targets
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- * Assumption: num_sockets == (max_package_num + 1)
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+ * Tune IVT multi-socket targets.
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+ * Assumption: num_sockets == (max_package_num + 1).
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*/
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static void __init ivt_idle_state_table_update (void )
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{
@@ -1338,11 +1338,11 @@ static unsigned long long __init irtl_2_usec(unsigned long long irtl)
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return div_u64 ((irtl & 0x3FF ) * ns , NSEC_PER_USEC );
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}
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- /*
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- * bxt_idle_state_table_update(void)
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+ /**
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+ * bxt_idle_state_table_update - Fix up the Broxton idle states table.
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*
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- * On BXT, we trust the IRTL to show the definitive maximum latency
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- * We use the same value for target_residency.
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+ * On BXT, trust the IRTL (Interrupt Response Time Limit) MSR to show the
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+ * definitive maximum latency and use the same value for target_residency.
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*/
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static void __init bxt_idle_state_table_update (void )
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{
@@ -1385,11 +1385,11 @@ static void __init bxt_idle_state_table_update(void)
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}
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}
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- /*
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- * sklh_idle_state_table_update(void)
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+
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+ /**
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+ * sklh_idle_state_table_update - Fix up the Sky Lake idle states table.
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*
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- * On SKL-H (model 0x5e) disable C8 and C9 if:
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- * C10 is enabled and SGX disabled
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+ * On SKL-H (model 0x5e) skip C8 and C9 if C10 is enabled and SGX disabled.
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*/
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static void __init sklh_idle_state_table_update (void )
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{
@@ -1500,9 +1500,9 @@ static void __init intel_idle_init_cstates_icpu(struct cpuidle_driver *drv)
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}
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}
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- /*
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- * intel_idle_cpuidle_driver_init()
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- * allocate, initialize cpuidle_states
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+ /**
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+ * intel_idle_cpuidle_driver_init - Create the list of available idle states.
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+ * @drv: cpuidle driver structure to initialize.
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*/
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static void __init intel_idle_cpuidle_driver_init (struct cpuidle_driver * drv )
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{
@@ -1537,10 +1537,12 @@ static void c1e_promotion_disable(void)
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wrmsrl (MSR_IA32_POWER_CTL , msr_bits );
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}
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- /*
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- * intel_idle_cpu_init()
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- * allocate, initialize, register cpuidle_devices
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- * @cpu: cpu/core to initialize
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+ /**
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+ * intel_idle_cpu_init - Register the target CPU with the cpuidle core.
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+ * @cpu: CPU to initialize.
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+ *
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+ * Register a cpuidle device object for @cpu and update its MSRs in accordance
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+ * with the processor model flags.
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*/
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static int intel_idle_cpu_init (unsigned int cpu )
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{
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