|
| 1 | +// SPDX-License-Identifier: GPL-2.0+ |
| 2 | +/* |
| 3 | + * Azoteq IQS620A PWM Generator |
| 4 | + * |
| 5 | + * Copyright (C) 2019 Jeff LaBundy <[email protected]> |
| 6 | + * |
| 7 | + * Limitations: |
| 8 | + * - The period is fixed to 1 ms and is generated continuously despite changes |
| 9 | + * to the duty cycle or enable/disable state. |
| 10 | + * - Changes to the duty cycle or enable/disable state take effect immediately |
| 11 | + * and may result in a glitch during the period in which the change is made. |
| 12 | + * - The device cannot generate a 0% duty cycle. For duty cycles below 1 / 256 |
| 13 | + * ms, the output is disabled and relies upon an external pull-down resistor |
| 14 | + * to hold the GPIO3/LTX pin low. |
| 15 | + */ |
| 16 | + |
| 17 | +#include <linux/device.h> |
| 18 | +#include <linux/kernel.h> |
| 19 | +#include <linux/mfd/iqs62x.h> |
| 20 | +#include <linux/module.h> |
| 21 | +#include <linux/mutex.h> |
| 22 | +#include <linux/notifier.h> |
| 23 | +#include <linux/platform_device.h> |
| 24 | +#include <linux/pwm.h> |
| 25 | +#include <linux/regmap.h> |
| 26 | +#include <linux/slab.h> |
| 27 | + |
| 28 | +#define IQS620_PWR_SETTINGS 0xD2 |
| 29 | +#define IQS620_PWR_SETTINGS_PWM_OUT BIT(7) |
| 30 | + |
| 31 | +#define IQS620_PWM_DUTY_CYCLE 0xD8 |
| 32 | + |
| 33 | +#define IQS620_PWM_PERIOD_NS 1000000 |
| 34 | + |
| 35 | +struct iqs620_pwm_private { |
| 36 | + struct iqs62x_core *iqs62x; |
| 37 | + struct pwm_chip chip; |
| 38 | + struct notifier_block notifier; |
| 39 | + struct mutex lock; |
| 40 | + bool out_en; |
| 41 | + u8 duty_val; |
| 42 | +}; |
| 43 | + |
| 44 | +static int iqs620_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, |
| 45 | + const struct pwm_state *state) |
| 46 | +{ |
| 47 | + struct iqs620_pwm_private *iqs620_pwm; |
| 48 | + struct iqs62x_core *iqs62x; |
| 49 | + int duty_scale, ret; |
| 50 | + |
| 51 | + if (state->polarity != PWM_POLARITY_NORMAL) |
| 52 | + return -ENOTSUPP; |
| 53 | + |
| 54 | + if (state->period < IQS620_PWM_PERIOD_NS) |
| 55 | + return -EINVAL; |
| 56 | + |
| 57 | + iqs620_pwm = container_of(chip, struct iqs620_pwm_private, chip); |
| 58 | + iqs62x = iqs620_pwm->iqs62x; |
| 59 | + |
| 60 | + /* |
| 61 | + * The duty cycle generated by the device is calculated as follows: |
| 62 | + * |
| 63 | + * duty_cycle = (IQS620_PWM_DUTY_CYCLE + 1) / 256 * 1 ms |
| 64 | + * |
| 65 | + * ...where IQS620_PWM_DUTY_CYCLE is a register value between 0 and 255 |
| 66 | + * (inclusive). Therefore the lowest duty cycle the device can generate |
| 67 | + * while the output is enabled is 1 / 256 ms. |
| 68 | + * |
| 69 | + * For lower duty cycles (e.g. 0), the PWM output is simply disabled to |
| 70 | + * allow an external pull-down resistor to hold the GPIO3/LTX pin low. |
| 71 | + */ |
| 72 | + duty_scale = state->duty_cycle * 256 / IQS620_PWM_PERIOD_NS; |
| 73 | + |
| 74 | + mutex_lock(&iqs620_pwm->lock); |
| 75 | + |
| 76 | + if (!state->enabled || !duty_scale) { |
| 77 | + ret = regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS, |
| 78 | + IQS620_PWR_SETTINGS_PWM_OUT, 0); |
| 79 | + if (ret) |
| 80 | + goto err_mutex; |
| 81 | + } |
| 82 | + |
| 83 | + if (duty_scale) { |
| 84 | + u8 duty_val = min(duty_scale - 1, 0xFF); |
| 85 | + |
| 86 | + ret = regmap_write(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE, |
| 87 | + duty_val); |
| 88 | + if (ret) |
| 89 | + goto err_mutex; |
| 90 | + |
| 91 | + iqs620_pwm->duty_val = duty_val; |
| 92 | + } |
| 93 | + |
| 94 | + if (state->enabled && duty_scale) { |
| 95 | + ret = regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS, |
| 96 | + IQS620_PWR_SETTINGS_PWM_OUT, 0xFF); |
| 97 | + if (ret) |
| 98 | + goto err_mutex; |
| 99 | + } |
| 100 | + |
| 101 | + iqs620_pwm->out_en = state->enabled; |
| 102 | + |
| 103 | +err_mutex: |
| 104 | + mutex_unlock(&iqs620_pwm->lock); |
| 105 | + |
| 106 | + return ret; |
| 107 | +} |
| 108 | + |
| 109 | +static void iqs620_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, |
| 110 | + struct pwm_state *state) |
| 111 | +{ |
| 112 | + struct iqs620_pwm_private *iqs620_pwm; |
| 113 | + |
| 114 | + iqs620_pwm = container_of(chip, struct iqs620_pwm_private, chip); |
| 115 | + |
| 116 | + mutex_lock(&iqs620_pwm->lock); |
| 117 | + |
| 118 | + /* |
| 119 | + * Since the device cannot generate a 0% duty cycle, requests to do so |
| 120 | + * cause subsequent calls to iqs620_pwm_get_state to report the output |
| 121 | + * as disabled with duty cycle equal to that which was in use prior to |
| 122 | + * the request. This is not ideal, but is the best compromise based on |
| 123 | + * the capabilities of the device. |
| 124 | + */ |
| 125 | + state->enabled = iqs620_pwm->out_en; |
| 126 | + state->duty_cycle = DIV_ROUND_UP((iqs620_pwm->duty_val + 1) * |
| 127 | + IQS620_PWM_PERIOD_NS, 256); |
| 128 | + |
| 129 | + mutex_unlock(&iqs620_pwm->lock); |
| 130 | + |
| 131 | + state->period = IQS620_PWM_PERIOD_NS; |
| 132 | +} |
| 133 | + |
| 134 | +static int iqs620_pwm_notifier(struct notifier_block *notifier, |
| 135 | + unsigned long event_flags, void *context) |
| 136 | +{ |
| 137 | + struct iqs620_pwm_private *iqs620_pwm; |
| 138 | + struct iqs62x_core *iqs62x; |
| 139 | + int ret; |
| 140 | + |
| 141 | + if (!(event_flags & BIT(IQS62X_EVENT_SYS_RESET))) |
| 142 | + return NOTIFY_DONE; |
| 143 | + |
| 144 | + iqs620_pwm = container_of(notifier, struct iqs620_pwm_private, |
| 145 | + notifier); |
| 146 | + iqs62x = iqs620_pwm->iqs62x; |
| 147 | + |
| 148 | + mutex_lock(&iqs620_pwm->lock); |
| 149 | + |
| 150 | + /* |
| 151 | + * The parent MFD driver already prints an error message in the event |
| 152 | + * of a device reset, so nothing else is printed here unless there is |
| 153 | + * an additional failure. |
| 154 | + */ |
| 155 | + ret = regmap_write(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE, |
| 156 | + iqs620_pwm->duty_val); |
| 157 | + if (ret) |
| 158 | + goto err_mutex; |
| 159 | + |
| 160 | + ret = regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS, |
| 161 | + IQS620_PWR_SETTINGS_PWM_OUT, |
| 162 | + iqs620_pwm->out_en ? 0xFF : 0); |
| 163 | + |
| 164 | +err_mutex: |
| 165 | + mutex_unlock(&iqs620_pwm->lock); |
| 166 | + |
| 167 | + if (ret) { |
| 168 | + dev_err(iqs620_pwm->chip.dev, |
| 169 | + "Failed to re-initialize device: %d\n", ret); |
| 170 | + return NOTIFY_BAD; |
| 171 | + } |
| 172 | + |
| 173 | + return NOTIFY_OK; |
| 174 | +} |
| 175 | + |
| 176 | +static const struct pwm_ops iqs620_pwm_ops = { |
| 177 | + .apply = iqs620_pwm_apply, |
| 178 | + .get_state = iqs620_pwm_get_state, |
| 179 | + .owner = THIS_MODULE, |
| 180 | +}; |
| 181 | + |
| 182 | +static void iqs620_pwm_notifier_unregister(void *context) |
| 183 | +{ |
| 184 | + struct iqs620_pwm_private *iqs620_pwm = context; |
| 185 | + int ret; |
| 186 | + |
| 187 | + ret = blocking_notifier_chain_unregister(&iqs620_pwm->iqs62x->nh, |
| 188 | + &iqs620_pwm->notifier); |
| 189 | + if (ret) |
| 190 | + dev_err(iqs620_pwm->chip.dev, |
| 191 | + "Failed to unregister notifier: %d\n", ret); |
| 192 | +} |
| 193 | + |
| 194 | +static int iqs620_pwm_probe(struct platform_device *pdev) |
| 195 | +{ |
| 196 | + struct iqs62x_core *iqs62x = dev_get_drvdata(pdev->dev.parent); |
| 197 | + struct iqs620_pwm_private *iqs620_pwm; |
| 198 | + unsigned int val; |
| 199 | + int ret; |
| 200 | + |
| 201 | + iqs620_pwm = devm_kzalloc(&pdev->dev, sizeof(*iqs620_pwm), GFP_KERNEL); |
| 202 | + if (!iqs620_pwm) |
| 203 | + return -ENOMEM; |
| 204 | + |
| 205 | + platform_set_drvdata(pdev, iqs620_pwm); |
| 206 | + iqs620_pwm->iqs62x = iqs62x; |
| 207 | + |
| 208 | + ret = regmap_read(iqs62x->regmap, IQS620_PWR_SETTINGS, &val); |
| 209 | + if (ret) |
| 210 | + return ret; |
| 211 | + iqs620_pwm->out_en = val & IQS620_PWR_SETTINGS_PWM_OUT; |
| 212 | + |
| 213 | + ret = regmap_read(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE, &val); |
| 214 | + if (ret) |
| 215 | + return ret; |
| 216 | + iqs620_pwm->duty_val = val; |
| 217 | + |
| 218 | + iqs620_pwm->chip.dev = &pdev->dev; |
| 219 | + iqs620_pwm->chip.ops = &iqs620_pwm_ops; |
| 220 | + iqs620_pwm->chip.base = -1; |
| 221 | + iqs620_pwm->chip.npwm = 1; |
| 222 | + |
| 223 | + mutex_init(&iqs620_pwm->lock); |
| 224 | + |
| 225 | + iqs620_pwm->notifier.notifier_call = iqs620_pwm_notifier; |
| 226 | + ret = blocking_notifier_chain_register(&iqs620_pwm->iqs62x->nh, |
| 227 | + &iqs620_pwm->notifier); |
| 228 | + if (ret) { |
| 229 | + dev_err(&pdev->dev, "Failed to register notifier: %d\n", ret); |
| 230 | + return ret; |
| 231 | + } |
| 232 | + |
| 233 | + ret = devm_add_action_or_reset(&pdev->dev, |
| 234 | + iqs620_pwm_notifier_unregister, |
| 235 | + iqs620_pwm); |
| 236 | + if (ret) |
| 237 | + return ret; |
| 238 | + |
| 239 | + ret = pwmchip_add(&iqs620_pwm->chip); |
| 240 | + if (ret) |
| 241 | + dev_err(&pdev->dev, "Failed to add device: %d\n", ret); |
| 242 | + |
| 243 | + return ret; |
| 244 | +} |
| 245 | + |
| 246 | +static int iqs620_pwm_remove(struct platform_device *pdev) |
| 247 | +{ |
| 248 | + struct iqs620_pwm_private *iqs620_pwm = platform_get_drvdata(pdev); |
| 249 | + int ret; |
| 250 | + |
| 251 | + ret = pwmchip_remove(&iqs620_pwm->chip); |
| 252 | + if (ret) |
| 253 | + dev_err(&pdev->dev, "Failed to remove device: %d\n", ret); |
| 254 | + |
| 255 | + return ret; |
| 256 | +} |
| 257 | + |
| 258 | +static struct platform_driver iqs620_pwm_platform_driver = { |
| 259 | + .driver = { |
| 260 | + .name = "iqs620a-pwm", |
| 261 | + }, |
| 262 | + .probe = iqs620_pwm_probe, |
| 263 | + .remove = iqs620_pwm_remove, |
| 264 | +}; |
| 265 | +module_platform_driver(iqs620_pwm_platform_driver); |
| 266 | + |
| 267 | +MODULE_AUTHOR( "Jeff LaBundy <[email protected]>"); |
| 268 | +MODULE_DESCRIPTION("Azoteq IQS620A PWM Generator"); |
| 269 | +MODULE_LICENSE("GPL"); |
| 270 | +MODULE_ALIAS("platform:iqs620a-pwm"); |
0 commit comments