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drm: xlnx: zynqmp: Use switch - case for link rate downshift
Use switch - case to downshift from the current link rate. It's a small loop now, so fine to be replaced with switch - case. With a loop, it is confusing and hard to follow as reported below. The patch d76271d: "drm: xlnx: DRM/KMS driver for Xilinx ZynqMP DisplayPort Subsystem" from Jul 7, 2018, leads to the following static checker warning: drivers/gpu/drm/xlnx/zynqmp_dp.c:594 zynqmp_dp_mode_configure() error: iterator underflow 'bws' (-1)-2 Reported-by: Dan Carpenter <[email protected]> Signed-off-by: Hyun Kwon <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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drivers/gpu/drm/xlnx/zynqmp_dp.c

Lines changed: 16 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -567,34 +567,37 @@ static int zynqmp_dp_mode_configure(struct zynqmp_dp *dp, int pclock,
567567
u8 current_bw)
568568
{
569569
int max_rate = dp->link_config.max_rate;
570-
u8 bws[3] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7, DP_LINK_BW_5_4 };
570+
u8 bw_code;
571571
u8 max_lanes = dp->link_config.max_lanes;
572572
u8 max_link_rate_code = drm_dp_link_rate_to_bw_code(max_rate);
573573
u8 bpp = dp->config.bpp;
574574
u8 lane_cnt;
575-
s8 i;
576575

577-
if (current_bw == DP_LINK_BW_1_62) {
576+
/* Downshift from current bandwidth */
577+
switch (current_bw) {
578+
case DP_LINK_BW_5_4:
579+
bw_code = DP_LINK_BW_2_7;
580+
break;
581+
case DP_LINK_BW_2_7:
582+
bw_code = DP_LINK_BW_1_62;
583+
break;
584+
case DP_LINK_BW_1_62:
578585
dev_err(dp->dev, "can't downshift. already lowest link rate\n");
579586
return -EINVAL;
580-
}
581-
582-
for (i = ARRAY_SIZE(bws) - 1; i >= 0; i--) {
583-
if (current_bw && bws[i] >= current_bw)
584-
continue;
585-
586-
if (bws[i] <= max_link_rate_code)
587-
break;
587+
default:
588+
/* If not given, start with max supported */
589+
bw_code = max_link_rate_code;
590+
break;
588591
}
589592

590593
for (lane_cnt = 1; lane_cnt <= max_lanes; lane_cnt <<= 1) {
591594
int bw;
592595
u32 rate;
593596

594-
bw = drm_dp_bw_code_to_link_rate(bws[i]);
597+
bw = drm_dp_bw_code_to_link_rate(bw_code);
595598
rate = zynqmp_dp_max_rate(bw, lane_cnt, bpp);
596599
if (pclock <= rate) {
597-
dp->mode.bw_code = bws[i];
600+
dp->mode.bw_code = bw_code;
598601
dp->mode.lane_cnt = lane_cnt;
599602
dp->mode.pclock = pclock;
600603
return dp->mode.bw_code;

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