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jhovoldandersson
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arm64: dts: qcom: sc8280xp: fix USB-DP PHY nodes
Update the USB4-USB3-DP QMP PHY nodes to match the new binding which specifically includes the missing register regions (e.g. DP_PHY) and allows for supporting DisplayPort Alternate Mode. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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arch/arm64/boot/dts/qcom/sc8280xp.dtsi

Lines changed: 23 additions & 54 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@
1010
#include <dt-bindings/interconnect/qcom,sc8280xp.h>
1111
#include <dt-bindings/interrupt-controller/arm-gic.h>
1212
#include <dt-bindings/mailbox/qcom-ipcc.h>
13+
#include <dt-bindings/phy/phy-qcom-qmp.h>
1314
#include <dt-bindings/power/qcom-rpmpd.h>
1415
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
1516
#include <dt-bindings/thermal/thermal.h>
@@ -762,15 +763,15 @@
762763
<0>,
763764
<0>,
764765
<0>,
765-
<&usb_0_ssphy>,
766+
<&usb_0_qmpphy QMP_USB43DP_USB3_PIPE_CLK>,
766767
<0>,
767768
<0>,
768769
<0>,
769770
<0>,
770771
<0>,
771772
<0>,
772773
<0>,
773-
<&usb_1_ssphy>,
774+
<&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>,
774775
<0>,
775776
<0>,
776777
<0>,
@@ -1673,42 +1674,26 @@
16731674
};
16741675
};
16751676

1676-
usb_0_qmpphy: phy-wrapper@88ec000 {
1677+
usb_0_qmpphy: phy@88eb000 {
16771678
compatible = "qcom,sc8280xp-qmp-usb43dp-phy";
1678-
reg = <0 0x088ec000 0 0x1e4>,
1679-
<0 0x088eb000 0 0x40>,
1680-
<0 0x088ed000 0 0x1c8>;
1681-
#address-cells = <2>;
1682-
#size-cells = <2>;
1683-
ranges;
1679+
reg = <0 0x088eb000 0 0x4000>;
16841680

16851681
clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
1686-
<&rpmhcc RPMH_CXO_CLK>,
16871682
<&gcc GCC_USB4_EUD_CLKREF_CLK>,
1688-
<&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
1689-
clock-names = "aux", "ref_clk_src", "ref", "com_aux";
1683+
<&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
1684+
<&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
1685+
clock-names = "aux", "ref", "com_aux", "usb3_pipe";
1686+
1687+
power-domains = <&gcc USB30_PRIM_GDSC>;
16901688

16911689
resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
16921690
<&gcc GCC_USB4_DP_PHY_PRIM_BCR>;
16931691
reset-names = "phy", "common";
16941692

1695-
power-domains = <&gcc USB30_PRIM_GDSC>;
1693+
#clock-cells = <1>;
1694+
#phy-cells = <1>;
16961695

16971696
status = "disabled";
1698-
1699-
usb_0_ssphy: usb3-phy@88eb400 {
1700-
reg = <0 0x088eb400 0 0x100>,
1701-
<0 0x088eb600 0 0x3ec>,
1702-
<0 0x088ec400 0 0x364>,
1703-
<0 0x088eba00 0 0x100>,
1704-
<0 0x088ebc00 0 0x3ec>,
1705-
<0 0x088ec200 0 0x18>;
1706-
#phy-cells = <0>;
1707-
#clock-cells = <0>;
1708-
clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
1709-
clock-names = "pipe0";
1710-
clock-output-names = "usb0_phy_pipe_clk_src";
1711-
};
17121697
};
17131698

17141699
usb_1_hsphy: phy@8902000 {
@@ -1725,42 +1710,26 @@
17251710
status = "disabled";
17261711
};
17271712

1728-
usb_1_qmpphy: phy-wrapper@8904000 {
1713+
usb_1_qmpphy: phy@8903000 {
17291714
compatible = "qcom,sc8280xp-qmp-usb43dp-phy";
1730-
reg = <0 0x08904000 0 0x1e4>,
1731-
<0 0x08903000 0 0x40>,
1732-
<0 0x08905000 0 0x1c8>;
1733-
#address-cells = <2>;
1734-
#size-cells = <2>;
1735-
ranges;
1715+
reg = <0 0x08903000 0 0x4000>;
17361716

17371717
clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
1738-
<&rpmhcc RPMH_CXO_CLK>,
17391718
<&gcc GCC_USB4_CLKREF_CLK>,
1740-
<&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
1741-
clock-names = "aux", "ref_clk_src", "ref", "com_aux";
1719+
<&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>,
1720+
<&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
1721+
clock-names = "aux", "ref", "com_aux", "usb3_pipe";
1722+
1723+
power-domains = <&gcc USB30_SEC_GDSC>;
17421724

17431725
resets = <&gcc GCC_USB3_PHY_SEC_BCR>,
17441726
<&gcc GCC_USB4_1_DP_PHY_PRIM_BCR>;
17451727
reset-names = "phy", "common";
17461728

1747-
power-domains = <&gcc USB30_SEC_GDSC>;
1729+
#clock-cells = <1>;
1730+
#phy-cells = <1>;
17481731

17491732
status = "disabled";
1750-
1751-
usb_1_ssphy: usb3-phy@8903400 {
1752-
reg = <0 0x08903400 0 0x100>,
1753-
<0 0x08903600 0 0x3ec>,
1754-
<0 0x08904400 0 0x364>,
1755-
<0 0x08903a00 0 0x100>,
1756-
<0 0x08903c00 0 0x3ec>,
1757-
<0 0x08904200 0 0x18>;
1758-
#phy-cells = <0>;
1759-
#clock-cells = <0>;
1760-
clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
1761-
clock-names = "pipe0";
1762-
clock-output-names = "usb1_phy_pipe_clk_src";
1763-
};
17641733
};
17651734

17661735
pmu@9091000 {
@@ -1910,7 +1879,7 @@
19101879
reg = <0 0x0a600000 0 0xcd00>;
19111880
interrupts = <GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>;
19121881
iommus = <&apps_smmu 0x820 0x0>;
1913-
phys = <&usb_0_hsphy>, <&usb_0_ssphy>;
1882+
phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>;
19141883
phy-names = "usb2-phy", "usb3-phy";
19151884
};
19161885
};
@@ -1964,7 +1933,7 @@
19641933
reg = <0 0x0a800000 0 0xcd00>;
19651934
interrupts = <GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH>;
19661935
iommus = <&apps_smmu 0x860 0x0>;
1967-
phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
1936+
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
19681937
phy-names = "usb2-phy", "usb3-phy";
19691938
};
19701939
};

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