|
10 | 10 | #include <dt-bindings/interconnect/qcom,sc8280xp.h>
|
11 | 11 | #include <dt-bindings/interrupt-controller/arm-gic.h>
|
12 | 12 | #include <dt-bindings/mailbox/qcom-ipcc.h>
|
| 13 | +#include <dt-bindings/phy/phy-qcom-qmp.h> |
13 | 14 | #include <dt-bindings/power/qcom-rpmpd.h>
|
14 | 15 | #include <dt-bindings/soc/qcom,rpmh-rsc.h>
|
15 | 16 | #include <dt-bindings/thermal/thermal.h>
|
|
762 | 763 | <0>,
|
763 | 764 | <0>,
|
764 | 765 | <0>,
|
765 |
| - <&usb_0_ssphy>, |
| 766 | + <&usb_0_qmpphy QMP_USB43DP_USB3_PIPE_CLK>, |
766 | 767 | <0>,
|
767 | 768 | <0>,
|
768 | 769 | <0>,
|
769 | 770 | <0>,
|
770 | 771 | <0>,
|
771 | 772 | <0>,
|
772 | 773 | <0>,
|
773 |
| - <&usb_1_ssphy>, |
| 774 | + <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>, |
774 | 775 | <0>,
|
775 | 776 | <0>,
|
776 | 777 | <0>,
|
|
1673 | 1674 | };
|
1674 | 1675 | };
|
1675 | 1676 |
|
1676 |
| - usb_0_qmpphy: phy-wrapper@88ec000 { |
| 1677 | + usb_0_qmpphy: phy@88eb000 { |
1677 | 1678 | compatible = "qcom,sc8280xp-qmp-usb43dp-phy";
|
1678 |
| - reg = <0 0x088ec000 0 0x1e4>, |
1679 |
| - <0 0x088eb000 0 0x40>, |
1680 |
| - <0 0x088ed000 0 0x1c8>; |
1681 |
| - #address-cells = <2>; |
1682 |
| - #size-cells = <2>; |
1683 |
| - ranges; |
| 1679 | + reg = <0 0x088eb000 0 0x4000>; |
1684 | 1680 |
|
1685 | 1681 | clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
|
1686 |
| - <&rpmhcc RPMH_CXO_CLK>, |
1687 | 1682 | <&gcc GCC_USB4_EUD_CLKREF_CLK>,
|
1688 |
| - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; |
1689 |
| - clock-names = "aux", "ref_clk_src", "ref", "com_aux"; |
| 1683 | + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, |
| 1684 | + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; |
| 1685 | + clock-names = "aux", "ref", "com_aux", "usb3_pipe"; |
| 1686 | + |
| 1687 | + power-domains = <&gcc USB30_PRIM_GDSC>; |
1690 | 1688 |
|
1691 | 1689 | resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
|
1692 | 1690 | <&gcc GCC_USB4_DP_PHY_PRIM_BCR>;
|
1693 | 1691 | reset-names = "phy", "common";
|
1694 | 1692 |
|
1695 |
| - power-domains = <&gcc USB30_PRIM_GDSC>; |
| 1693 | + #clock-cells = <1>; |
| 1694 | + #phy-cells = <1>; |
1696 | 1695 |
|
1697 | 1696 | status = "disabled";
|
1698 |
| - |
1699 |
| - usb_0_ssphy: usb3-phy@88eb400 { |
1700 |
| - reg = <0 0x088eb400 0 0x100>, |
1701 |
| - <0 0x088eb600 0 0x3ec>, |
1702 |
| - <0 0x088ec400 0 0x364>, |
1703 |
| - <0 0x088eba00 0 0x100>, |
1704 |
| - <0 0x088ebc00 0 0x3ec>, |
1705 |
| - <0 0x088ec200 0 0x18>; |
1706 |
| - #phy-cells = <0>; |
1707 |
| - #clock-cells = <0>; |
1708 |
| - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; |
1709 |
| - clock-names = "pipe0"; |
1710 |
| - clock-output-names = "usb0_phy_pipe_clk_src"; |
1711 |
| - }; |
1712 | 1697 | };
|
1713 | 1698 |
|
1714 | 1699 | usb_1_hsphy: phy@8902000 {
|
|
1725 | 1710 | status = "disabled";
|
1726 | 1711 | };
|
1727 | 1712 |
|
1728 |
| - usb_1_qmpphy: phy-wrapper@8904000 { |
| 1713 | + usb_1_qmpphy: phy@8903000 { |
1729 | 1714 | compatible = "qcom,sc8280xp-qmp-usb43dp-phy";
|
1730 |
| - reg = <0 0x08904000 0 0x1e4>, |
1731 |
| - <0 0x08903000 0 0x40>, |
1732 |
| - <0 0x08905000 0 0x1c8>; |
1733 |
| - #address-cells = <2>; |
1734 |
| - #size-cells = <2>; |
1735 |
| - ranges; |
| 1715 | + reg = <0 0x08903000 0 0x4000>; |
1736 | 1716 |
|
1737 | 1717 | clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
|
1738 |
| - <&rpmhcc RPMH_CXO_CLK>, |
1739 | 1718 | <&gcc GCC_USB4_CLKREF_CLK>,
|
1740 |
| - <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; |
1741 |
| - clock-names = "aux", "ref_clk_src", "ref", "com_aux"; |
| 1719 | + <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>, |
| 1720 | + <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; |
| 1721 | + clock-names = "aux", "ref", "com_aux", "usb3_pipe"; |
| 1722 | + |
| 1723 | + power-domains = <&gcc USB30_SEC_GDSC>; |
1742 | 1724 |
|
1743 | 1725 | resets = <&gcc GCC_USB3_PHY_SEC_BCR>,
|
1744 | 1726 | <&gcc GCC_USB4_1_DP_PHY_PRIM_BCR>;
|
1745 | 1727 | reset-names = "phy", "common";
|
1746 | 1728 |
|
1747 |
| - power-domains = <&gcc USB30_SEC_GDSC>; |
| 1729 | + #clock-cells = <1>; |
| 1730 | + #phy-cells = <1>; |
1748 | 1731 |
|
1749 | 1732 | status = "disabled";
|
1750 |
| - |
1751 |
| - usb_1_ssphy: usb3-phy@8903400 { |
1752 |
| - reg = <0 0x08903400 0 0x100>, |
1753 |
| - <0 0x08903600 0 0x3ec>, |
1754 |
| - <0 0x08904400 0 0x364>, |
1755 |
| - <0 0x08903a00 0 0x100>, |
1756 |
| - <0 0x08903c00 0 0x3ec>, |
1757 |
| - <0 0x08904200 0 0x18>; |
1758 |
| - #phy-cells = <0>; |
1759 |
| - #clock-cells = <0>; |
1760 |
| - clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; |
1761 |
| - clock-names = "pipe0"; |
1762 |
| - clock-output-names = "usb1_phy_pipe_clk_src"; |
1763 |
| - }; |
1764 | 1733 | };
|
1765 | 1734 |
|
1766 | 1735 | pmu@9091000 {
|
|
1910 | 1879 | reg = <0 0x0a600000 0 0xcd00>;
|
1911 | 1880 | interrupts = <GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>;
|
1912 | 1881 | iommus = <&apps_smmu 0x820 0x0>;
|
1913 |
| - phys = <&usb_0_hsphy>, <&usb_0_ssphy>; |
| 1882 | + phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>; |
1914 | 1883 | phy-names = "usb2-phy", "usb3-phy";
|
1915 | 1884 | };
|
1916 | 1885 | };
|
|
1964 | 1933 | reg = <0 0x0a800000 0 0xcd00>;
|
1965 | 1934 | interrupts = <GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH>;
|
1966 | 1935 | iommus = <&apps_smmu 0x860 0x0>;
|
1967 |
| - phys = <&usb_1_hsphy>, <&usb_1_ssphy>; |
| 1936 | + phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; |
1968 | 1937 | phy-names = "usb2-phy", "usb3-phy";
|
1969 | 1938 | };
|
1970 | 1939 | };
|
|
0 commit comments