|
246 | 246 | cpu_on = <0x84000003>;
|
247 | 247 | };
|
248 | 248 |
|
249 |
| - clk26m: oscillator@0 { |
| 249 | + clk26m: oscillator0 { |
250 | 250 | compatible = "fixed-clock";
|
251 | 251 | #clock-cells = <0>;
|
252 | 252 | clock-frequency = <26000000>;
|
253 | 253 | clock-output-names = "clk26m";
|
254 | 254 | };
|
255 | 255 |
|
256 |
| - clk32k: oscillator@1 { |
| 256 | + clk32k: oscillator1 { |
257 | 257 | compatible = "fixed-clock";
|
258 | 258 | #clock-cells = <0>;
|
259 | 259 | clock-frequency = <32000>;
|
260 | 260 | clock-output-names = "clk32k";
|
261 | 261 | };
|
262 | 262 |
|
263 |
| - cpum_ck: oscillator@2 { |
| 263 | + cpum_ck: oscillator2 { |
264 | 264 | compatible = "fixed-clock";
|
265 | 265 | #clock-cells = <0>;
|
266 | 266 | clock-frequency = <0>;
|
|
276 | 276 | sustainable-power = <1500>; /* milliwatts */
|
277 | 277 |
|
278 | 278 | trips {
|
279 |
| - threshold: trip-point@0 { |
| 279 | + threshold: trip-point0 { |
280 | 280 | temperature = <68000>;
|
281 | 281 | hysteresis = <2000>;
|
282 | 282 | type = "passive";
|
283 | 283 | };
|
284 | 284 |
|
285 |
| - target: trip-point@1 { |
| 285 | + target: trip-point1 { |
286 | 286 | temperature = <85000>;
|
287 | 287 | hysteresis = <2000>;
|
288 | 288 | type = "passive";
|
289 | 289 | };
|
290 | 290 |
|
291 |
| - cpu_crit: cpu_crit@0 { |
| 291 | + cpu_crit: cpu_crit0 { |
292 | 292 | temperature = <115000>;
|
293 | 293 | hysteresis = <2000>;
|
294 | 294 | type = "critical";
|
295 | 295 | };
|
296 | 296 | };
|
297 | 297 |
|
298 | 298 | cooling-maps {
|
299 |
| - map@0 { |
| 299 | + map0 { |
300 | 300 | trip = <&target>;
|
301 | 301 | cooling-device = <&cpu0 0 0>,
|
302 | 302 | <&cpu1 0 0>;
|
303 | 303 | contribution = <3072>;
|
304 | 304 | };
|
305 |
| - map@1 { |
| 305 | + map1 { |
306 | 306 | trip = <&target>;
|
307 | 307 | cooling-device = <&cpu2 0 0>,
|
308 | 308 | <&cpu3 0 0>;
|
|
316 | 316 | #address-cells = <2>;
|
317 | 317 | #size-cells = <2>;
|
318 | 318 | ranges;
|
319 |
| - vpu_dma_reserved: vpu_dma_mem_region { |
| 319 | + vpu_dma_reserved: vpu_dma_mem_region@b7000000 { |
320 | 320 | compatible = "shared-dma-pool";
|
321 | 321 | reg = <0 0xb7000000 0 0x500000>;
|
322 | 322 | alignment = <0x1000>;
|
|
369 | 369 | reg = <0 0x10005000 0 0x1000>;
|
370 | 370 | };
|
371 | 371 |
|
372 |
| - pio: pinctrl@10005000 { |
| 372 | + pio: pinctrl@1000b000 { |
373 | 373 | compatible = "mediatek,mt8173-pinctrl";
|
374 | 374 | reg = <0 0x1000b000 0 0x1000>;
|
375 | 375 | mediatek,pctl-regmap = <&syscfg_pctl_a>;
|
|
576 | 576 | status = "disabled";
|
577 | 577 | };
|
578 | 578 |
|
579 |
| - gic: interrupt-controller@10220000 { |
| 579 | + gic: interrupt-controller@10221000 { |
580 | 580 | compatible = "arm,gic-400";
|
581 | 581 | #interrupt-cells = <3>;
|
582 | 582 | interrupt-parent = <&gic>;
|
|
0 commit comments