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irqchip/gic-v2m: Switch to device MSI
All platform MSI users and the PCI/MSI code handle per device MSI domains when the irqdomain associated to the device provides MSI parent functionality. Remove the "global" PCI/MSI and platform domain related code and provide the MSI parent functionality by filling in msi_parent_ops. Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Anna-Maria Behnsen <[email protected]> Signed-off-by: Shivamurthy Shastri <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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-56
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2 files changed

+26
-56
lines changed

drivers/irqchip/Kconfig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,7 @@ config ARM_GIC_V2M
2626
bool
2727
depends on PCI
2828
select ARM_GIC
29+
select IRQ_MSI_LIB
2930
select PCI_MSI
3031

3132
config GIC_NON_BANKED

drivers/irqchip/irq-gic-v2m.c

Lines changed: 25 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,8 @@
2626
#include <linux/irqchip/arm-gic.h>
2727
#include <linux/irqchip/arm-gic-common.h>
2828

29+
#include "irq-msi-lib.h"
30+
2931
/*
3032
* MSI_TYPER:
3133
* [31:26] Reserved
@@ -72,31 +74,6 @@ struct v2m_data {
7274
u32 flags; /* v2m flags for specific implementation */
7375
};
7476

75-
static void gicv2m_mask_msi_irq(struct irq_data *d)
76-
{
77-
pci_msi_mask_irq(d);
78-
irq_chip_mask_parent(d);
79-
}
80-
81-
static void gicv2m_unmask_msi_irq(struct irq_data *d)
82-
{
83-
pci_msi_unmask_irq(d);
84-
irq_chip_unmask_parent(d);
85-
}
86-
87-
static struct irq_chip gicv2m_msi_irq_chip = {
88-
.name = "MSI",
89-
.irq_mask = gicv2m_mask_msi_irq,
90-
.irq_unmask = gicv2m_unmask_msi_irq,
91-
.irq_eoi = irq_chip_eoi_parent,
92-
};
93-
94-
static struct msi_domain_info gicv2m_msi_domain_info = {
95-
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
96-
MSI_FLAG_PCI_MSIX | MSI_FLAG_MULTI_PCI_MSI),
97-
.chip = &gicv2m_msi_irq_chip,
98-
};
99-
10077
static phys_addr_t gicv2m_get_msi_addr(struct v2m_data *v2m, int hwirq)
10178
{
10279
if (v2m->flags & GICV2M_GRAVITON_ADDRESS_ONLY)
@@ -230,6 +207,7 @@ static void gicv2m_irq_domain_free(struct irq_domain *domain,
230207
}
231208

232209
static const struct irq_domain_ops gicv2m_domain_ops = {
210+
.select = msi_lib_irq_domain_select,
233211
.alloc = gicv2m_irq_domain_alloc,
234212
.free = gicv2m_irq_domain_free,
235213
};
@@ -250,19 +228,6 @@ static bool is_msi_spi_valid(u32 base, u32 num)
250228
return true;
251229
}
252230

253-
static struct irq_chip gicv2m_pmsi_irq_chip = {
254-
.name = "pMSI",
255-
};
256-
257-
static struct msi_domain_ops gicv2m_pmsi_ops = {
258-
};
259-
260-
static struct msi_domain_info gicv2m_pmsi_domain_info = {
261-
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS),
262-
.ops = &gicv2m_pmsi_ops,
263-
.chip = &gicv2m_pmsi_irq_chip,
264-
};
265-
266231
static void __init gicv2m_teardown(void)
267232
{
268233
struct v2m_data *v2m, *tmp;
@@ -278,9 +243,27 @@ static void __init gicv2m_teardown(void)
278243
}
279244
}
280245

246+
247+
#define GICV2M_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \
248+
MSI_FLAG_USE_DEF_CHIP_OPS | \
249+
MSI_FLAG_PCI_MSI_MASK_PARENT)
250+
251+
#define GICV2M_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \
252+
MSI_FLAG_PCI_MSIX | \
253+
MSI_FLAG_MULTI_PCI_MSI)
254+
255+
static struct msi_parent_ops gicv2m_msi_parent_ops = {
256+
.supported_flags = GICV2M_MSI_FLAGS_SUPPORTED,
257+
.required_flags = GICV2M_MSI_FLAGS_REQUIRED,
258+
.bus_select_token = DOMAIN_BUS_NEXUS,
259+
.bus_select_mask = MATCH_PCI_MSI | MATCH_PLATFORM_MSI,
260+
.prefix = "GICv2m-",
261+
.init_dev_msi_info = msi_lib_init_dev_msi_info,
262+
};
263+
281264
static __init int gicv2m_allocate_domains(struct irq_domain *parent)
282265
{
283-
struct irq_domain *inner_domain, *pci_domain, *plat_domain;
266+
struct irq_domain *inner_domain;
284267
struct v2m_data *v2m;
285268

286269
v2m = list_first_entry_or_null(&v2m_nodes, struct v2m_data, entry);
@@ -295,22 +278,8 @@ static __init int gicv2m_allocate_domains(struct irq_domain *parent)
295278
}
296279

297280
irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS);
298-
pci_domain = pci_msi_create_irq_domain(v2m->fwnode,
299-
&gicv2m_msi_domain_info,
300-
inner_domain);
301-
plat_domain = platform_msi_create_irq_domain(v2m->fwnode,
302-
&gicv2m_pmsi_domain_info,
303-
inner_domain);
304-
if (!pci_domain || !plat_domain) {
305-
pr_err("Failed to create MSI domains\n");
306-
if (plat_domain)
307-
irq_domain_remove(plat_domain);
308-
if (pci_domain)
309-
irq_domain_remove(pci_domain);
310-
irq_domain_remove(inner_domain);
311-
return -ENOMEM;
312-
}
313-
281+
inner_domain->flags |= IRQ_DOMAIN_FLAG_MSI_PARENT;
282+
inner_domain->msi_parent_ops = &gicv2m_msi_parent_ops;
314283
return 0;
315284
}
316285

@@ -511,7 +480,7 @@ acpi_parse_madt_msi(union acpi_subtable_headers *header,
511480
pr_info("applying Amazon Graviton quirk\n");
512481
res.end = res.start + SZ_8K - 1;
513482
flags |= GICV2M_GRAVITON_ADDRESS_ONLY;
514-
gicv2m_msi_domain_info.flags &= ~MSI_FLAG_MULTI_PCI_MSI;
483+
gicv2m_msi_parent_ops.supported_flags &= ~MSI_FLAG_MULTI_PCI_MSI;
515484
}
516485

517486
if (m->flags & ACPI_MADT_OVERRIDE_SPI_VALUES) {

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