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drm/rockchip: dw_hdmi: Use auto-generated tables
The previous tables for mpll_cfg and curr_ctrl were created using the 20-pages of example settings provided by the PHY vendor. Those example settings weren't particularly dense, so there were places where we were guessing what the settings would be for 10-bit and 12-bit (not that we use those anyway). It was also always a lot of extra work every time we wanted to add a new clock rate since we had to cross-reference several tables. In <https://crrev.com/c/285855> I've gone through the work to figure out how to generate this table automatically. Let's now use the automatically generated table and then we'll never need to look at it again. We only support 8-bit mode right now and only support a small number of clock rates and I've verified that the only 8-bit rate that was affected was 148.5. That mode appears to have been wrong in the old table. Signed-off-by: Douglas Anderson <[email protected]> Signed-off-by: Yakir Yang <[email protected]> Signed-off-by: Jonas Karlman <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

Lines changed: 53 additions & 51 deletions
Original file line numberDiff line numberDiff line change
@@ -92,86 +92,88 @@ static struct rockchip_hdmi *to_rockchip_hdmi(struct drm_encoder *encoder)
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static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
9494
{
95-
27000000, {
96-
{ 0x00b3, 0x0000},
97-
{ 0x2153, 0x0000},
98-
{ 0x40f3, 0x0000}
95+
30666000, {
96+
{ 0x00b3, 0x0000 },
97+
{ 0x2153, 0x0000 },
98+
{ 0x40f3, 0x0000 },
9999
},
100100
}, {
101-
36000000, {
102-
{ 0x00b3, 0x0000},
103-
{ 0x2153, 0x0000},
104-
{ 0x40f3, 0x0000}
101+
36800000, {
102+
{ 0x00b3, 0x0000 },
103+
{ 0x2153, 0x0000 },
104+
{ 0x40a2, 0x0001 },
105105
},
106106
}, {
107-
40000000, {
108-
{ 0x00b3, 0x0000},
109-
{ 0x2153, 0x0000},
110-
{ 0x40f3, 0x0000}
107+
46000000, {
108+
{ 0x00b3, 0x0000 },
109+
{ 0x2142, 0x0001 },
110+
{ 0x40a2, 0x0001 },
111111
},
112112
}, {
113-
54000000, {
114-
{ 0x0072, 0x0001},
115-
{ 0x2142, 0x0001},
116-
{ 0x40a2, 0x0001},
113+
61333000, {
114+
{ 0x0072, 0x0001 },
115+
{ 0x2142, 0x0001 },
116+
{ 0x40a2, 0x0001 },
117117
},
118118
}, {
119-
65000000, {
120-
{ 0x0072, 0x0001},
121-
{ 0x2142, 0x0001},
122-
{ 0x40a2, 0x0001},
119+
73600000, {
120+
{ 0x0072, 0x0001 },
121+
{ 0x2142, 0x0001 },
122+
{ 0x4061, 0x0002 },
123123
},
124124
}, {
125-
66000000, {
126-
{ 0x013e, 0x0003},
127-
{ 0x217e, 0x0002},
128-
{ 0x4061, 0x0002}
125+
92000000, {
126+
{ 0x0072, 0x0001 },
127+
{ 0x2145, 0x0002 },
128+
{ 0x4061, 0x0002 },
129129
},
130130
}, {
131-
74250000, {
132-
{ 0x0072, 0x0001},
133-
{ 0x2145, 0x0002},
134-
{ 0x4061, 0x0002}
131+
122666000, {
132+
{ 0x0051, 0x0002 },
133+
{ 0x2145, 0x0002 },
134+
{ 0x4061, 0x0002 },
135135
},
136136
}, {
137-
83500000, {
138-
{ 0x0072, 0x0001},
137+
147200000, {
138+
{ 0x0051, 0x0002 },
139+
{ 0x2145, 0x0002 },
140+
{ 0x4064, 0x0003 },
139141
},
140142
}, {
141-
108000000, {
142-
{ 0x0051, 0x0002},
143-
{ 0x2145, 0x0002},
144-
{ 0x4061, 0x0002}
143+
184000000, {
144+
{ 0x0051, 0x0002 },
145+
{ 0x214c, 0x0003 },
146+
{ 0x4064, 0x0003 },
145147
},
146148
}, {
147-
106500000, {
148-
{ 0x0051, 0x0002},
149-
{ 0x2145, 0x0002},
150-
{ 0x4061, 0x0002}
151-
},
152-
}, {
153-
146250000, {
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{ 0x0051, 0x0002},
155-
{ 0x2145, 0x0002},
156-
{ 0x4061, 0x0002}
149+
226666000, {
150+
{ 0x0040, 0x0003 },
151+
{ 0x214c, 0x0003 },
152+
{ 0x4064, 0x0003 },
157153
},
158154
}, {
159-
148500000, {
160-
{ 0x0051, 0x0003},
161-
{ 0x214c, 0x0003},
162-
{ 0x4064, 0x0003}
155+
272000000, {
156+
{ 0x0040, 0x0003 },
157+
{ 0x214c, 0x0003 },
158+
{ 0x5a64, 0x0003 },
163159
},
164160
}, {
165161
340000000, {
166162
{ 0x0040, 0x0003 },
167163
{ 0x3b4c, 0x0003 },
168164
{ 0x5a64, 0x0003 },
169165
},
166+
}, {
167+
600000000, {
168+
{ 0x1a40, 0x0003 },
169+
{ 0x3b4c, 0x0003 },
170+
{ 0x5a64, 0x0003 },
171+
},
170172
}, {
171173
~0UL, {
172-
{ 0x00a0, 0x000a },
173-
{ 0x2001, 0x000f },
174-
{ 0x4002, 0x000f },
174+
{ 0x0000, 0x0000 },
175+
{ 0x0000, 0x0000 },
176+
{ 0x0000, 0x0000 },
175177
},
176178
}
177179
};

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