@@ -384,12 +384,12 @@ static void io_apic_modify_irq(struct mp_chip_data *data, bool masked,
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}
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}
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+ /*
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+ * Synchronize the IO-APIC and the CPU by doing a dummy read from the
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+ * IO-APIC
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+ */
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static void io_apic_sync (struct irq_pin_list * entry )
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{
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- /*
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- * Synchronize the IO-APIC and the CPU by doing
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- * a dummy read from the IO-APIC
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- */
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struct io_apic __iomem * io_apic ;
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io_apic = io_apic_base (entry -> apic );
@@ -442,17 +442,13 @@ static void __eoi_ioapic_pin(int apic, int pin, int vector)
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entry = entry1 = __ioapic_read_entry (apic , pin );
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- /*
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- * Mask the entry and change the trigger mode to edge.
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- */
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+ /* Mask the entry and change the trigger mode to edge. */
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entry1 .masked = true;
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entry1 .is_level = false;
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__ioapic_write_entry (apic , pin , entry1 );
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- /*
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- * Restore the previous level triggered entry.
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- */
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+ /* Restore the previous level triggered entry. */
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__ioapic_write_entry (apic , pin , entry );
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}
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}
@@ -1012,16 +1008,12 @@ static int pin_2_irq(int idx, int ioapic, int pin, unsigned int flags)
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{
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u32 gsi = mp_pin_to_gsi (ioapic , pin );
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- /*
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- * Debugging check, we are in big trouble if this message pops up!
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- */
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+ /* Debugging check, we are in big trouble if this message pops up! */
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if (mp_irqs [idx ].dstirq != pin )
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pr_err ("broken BIOS or MPTABLE parser, ayiee!!\n" );
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#ifdef CONFIG_X86_32
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- /*
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- * PCI IRQ command line redirection. Yes, limits are hardcoded.
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- */
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+ /* PCI IRQ command line redirection. Yes, limits are hardcoded. */
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if ((pin >= 16 ) && (pin <= 23 )) {
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if (pirq_entries [pin - 16 ] != -1 ) {
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if (!pirq_entries [pin - 16 ]) {
@@ -1296,8 +1288,9 @@ void __init enable_IO_APIC(void)
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/* See if any of the pins is in ExtINT mode */
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struct IO_APIC_route_entry entry = ioapic_read_entry (apic , pin );
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- /* If the interrupt line is enabled and in ExtInt mode
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- * I have found the pin where the i8259 is connected.
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+ /*
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+ * If the interrupt line is enabled and in ExtInt mode I
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+ * have found the pin where the i8259 is connected.
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*/
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if (!entry .masked &&
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entry .delivery_mode == APIC_DELIVERY_MODE_EXTINT ) {
@@ -1307,8 +1300,11 @@ void __init enable_IO_APIC(void)
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}
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}
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found_i8259 :
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- /* Look to see what if the MP table has reported the ExtINT */
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- /* If we could not find the appropriate pin by looking at the ioapic
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+
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+ /*
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+ * Look to see what if the MP table has reported the ExtINT
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+ *
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+ * If we could not find the appropriate pin by looking at the ioapic
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* the i8259 probably is not connected the ioapic but give the
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* mptable a chance anyway.
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*/
@@ -1348,9 +1344,7 @@ void native_restore_boot_irq_mode(void)
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entry .destid_0_7 = apic_id & 0xFF ;
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entry .virt_destid_8_14 = apic_id >> 8 ;
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- /*
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- * Add it to the IO-APIC irq-routing table:
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- */
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+ /* Add it to the IO-APIC irq-routing table */
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ioapic_write_entry (ioapic_i8259 .apic , ioapic_i8259 .pin , entry );
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}
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@@ -1427,8 +1421,8 @@ static void __init setup_ioapic_ids_from_mpc_nocheck(void)
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}
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/*
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- * We need to adjust the IRQ routing table
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- * if the ID changed.
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+ * We need to adjust the IRQ routing table if the ID
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+ * changed.
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*/
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if (old_id != mpc_ioapic_id (ioapic_idx ))
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for (i = 0 ; i < mp_irq_entries ; i ++ )
@@ -1437,8 +1431,8 @@ static void __init setup_ioapic_ids_from_mpc_nocheck(void)
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= mpc_ioapic_id (ioapic_idx );
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/*
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- * Update the ID register according to the right value
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- * from the MPC table if they are different.
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+ * Update the ID register according to the right value from
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+ * the MPC table if they are different.
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*/
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if (mpc_ioapic_id (ioapic_idx ) == reg_00 .bits .ID )
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continue ;
@@ -1562,21 +1556,17 @@ static int __init timer_irq_works(void)
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* so we 'resend' these IRQs via IPIs, to the same CPU. It's much
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* better to do it this way as thus we do not have to be aware of
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* 'pending' interrupts in the IRQ path, except at this point.
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- */
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- /*
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- * Edge triggered needs to resend any interrupt
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- * that was delayed but this is now handled in the device
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- * independent code.
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- */
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-
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- /*
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- * Starting up a edge-triggered IO-APIC interrupt is
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- * nasty - we need to make sure that we get the edge.
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- * If it is already asserted for some reason, we need
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- * return 1 to indicate that is was pending.
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*
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- * This is not complete - we should be able to fake
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- * an edge even if it isn't on the 8259A...
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+ *
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+ * Edge triggered needs to resend any interrupt that was delayed but this
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+ * is now handled in the device independent code.
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+ *
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+ * Starting up a edge-triggered IO-APIC interrupt is nasty - we need to
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+ * make sure that we get the edge. If it is already asserted for some
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+ * reason, we need return 1 to indicate that is was pending.
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+ *
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+ * This is not complete - we should be able to fake an edge even if it
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+ * isn't on the 8259A...
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*/
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static unsigned int startup_ioapic_irq (struct irq_data * data )
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{
@@ -1627,7 +1617,8 @@ static inline bool ioapic_prepare_move(struct irq_data *data)
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static inline void ioapic_finish_move (struct irq_data * data , bool moveit )
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{
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if (unlikely (moveit )) {
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- /* Only migrate the irq if the ack has been received.
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+ /*
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+ * Only migrate the irq if the ack has been received.
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*
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* On rare occasions the broadcast level triggered ack gets
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* delayed going to ioapics, and if we reprogram the
@@ -1904,14 +1895,13 @@ static inline void init_IO_APIC_traps(void)
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cfg = irq_cfg (irq );
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if (IO_APIC_IRQ (irq ) && cfg && !cfg -> vector ) {
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/*
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- * Hmm.. We don't have an entry for this,
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- * so default to an old-fashioned 8259
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- * interrupt if we can. .
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+ * Hmm.. We don't have an entry for this, so
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+ * default to an old-fashioned 8259 interrupt if we
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+ * can. Otherwise set the dummy interrupt chip .
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*/
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if (irq < nr_legacy_irqs ())
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legacy_pic -> make_irq (irq );
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else
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- /* Strange. Oh, well.. */
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irq_set_chip (irq , & no_irq_chip );
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}
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}
@@ -2307,9 +2297,7 @@ void __init setup_IO_APIC(void)
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for_each_ioapic (ioapic )
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BUG_ON (mp_irqdomain_create (ioapic ));
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- /*
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- * Set up IO-APIC IRQ routing.
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- */
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+ /* Set up IO-APIC IRQ routing. */
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x86_init .mpparse .setup_ioapic_ids ();
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sync_Arb_IDs ();
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