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Wolfram Sanglag-linaro
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mfd: tmio: Sanitize comments
Reformat the comments to utilize the maximum line length and use single line comments where appropriate. Remove superfluous comments, too. Signed-off-by: Wolfram Sang <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Lee Jones <[email protected]>
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include/linux/mfd/tmio.h

Lines changed: 11 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -5,23 +5,23 @@
55
#include <linux/platform_device.h>
66
#include <linux/types.h>
77

8-
/* tmio MMC platform flags */
8+
/* TMIO MMC platform flags */
9+
910
/*
10-
* Some controllers can support a 2-byte block size when the bus width
11-
* is configured in 4-bit mode.
11+
* Some controllers can support a 2-byte block size when the bus width is
12+
* configured in 4-bit mode.
1213
*/
1314
#define TMIO_MMC_BLKSZ_2BYTES BIT(1)
14-
/*
15-
* Some controllers can support SDIO IRQ signalling.
16-
*/
15+
16+
/* Some controllers can support SDIO IRQ signalling */
1717
#define TMIO_MMC_SDIO_IRQ BIT(2)
1818

1919
/* Some features are only available or tested on R-Car Gen2 or later */
2020
#define TMIO_MMC_MIN_RCAR2 BIT(3)
2121

2222
/*
23-
* Some controllers require waiting for the SD bus to become
24-
* idle before writing to some registers.
23+
* Some controllers require waiting for the SD bus to become idle before
24+
* writing to some registers.
2525
*/
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#define TMIO_MMC_HAS_IDLE_WAIT BIT(4)
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@@ -32,31 +32,21 @@
3232
*/
3333
#define TMIO_MMC_USE_BUSY_TIMEOUT BIT(5)
3434

35-
/*
36-
* Some controllers have CMD12 automatically
37-
* issue/non-issue register
38-
*/
35+
/* Some controllers have CMD12 automatically issue/non-issue register */
3936
#define TMIO_MMC_HAVE_CMD12_CTRL BIT(7)
4037

4138
/* Controller has some SDIO status bits which must be 1 */
4239
#define TMIO_MMC_SDIO_STATUS_SETBITS BIT(8)
4340

44-
/*
45-
* Some controllers have a 32-bit wide data port register
46-
*/
41+
/* Some controllers have a 32-bit wide data port register */
4742
#define TMIO_MMC_32BIT_DATA_PORT BIT(9)
4843

49-
/*
50-
* Some controllers allows to set SDx actual clock
51-
*/
44+
/* Some controllers allows to set SDx actual clock */
5245
#define TMIO_MMC_CLK_ACTUAL BIT(10)
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5447
/* Some controllers have a CBSY bit */
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#define TMIO_MMC_HAVE_CBSY BIT(11)
5649

57-
/*
58-
* data for the MMC controller
59-
*/
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struct tmio_mmc_data {
6151
void *chan_priv_tx;
6252
void *chan_priv_rx;

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