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5 | 5 | #include <linux/platform_device.h>
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6 | 6 | #include <linux/types.h>
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7 | 7 |
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8 |
| -/* tmio MMC platform flags */ |
| 8 | +/* TMIO MMC platform flags */ |
| 9 | + |
9 | 10 | /*
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10 |
| - * Some controllers can support a 2-byte block size when the bus width |
11 |
| - * is configured in 4-bit mode. |
| 11 | + * Some controllers can support a 2-byte block size when the bus width is |
| 12 | + * configured in 4-bit mode. |
12 | 13 | */
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13 | 14 | #define TMIO_MMC_BLKSZ_2BYTES BIT(1)
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14 |
| -/* |
15 |
| - * Some controllers can support SDIO IRQ signalling. |
16 |
| - */ |
| 15 | + |
| 16 | +/* Some controllers can support SDIO IRQ signalling */ |
17 | 17 | #define TMIO_MMC_SDIO_IRQ BIT(2)
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18 | 18 |
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19 | 19 | /* Some features are only available or tested on R-Car Gen2 or later */
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20 | 20 | #define TMIO_MMC_MIN_RCAR2 BIT(3)
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21 | 21 |
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22 | 22 | /*
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23 |
| - * Some controllers require waiting for the SD bus to become |
24 |
| - * idle before writing to some registers. |
| 23 | + * Some controllers require waiting for the SD bus to become idle before |
| 24 | + * writing to some registers. |
25 | 25 | */
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26 | 26 | #define TMIO_MMC_HAS_IDLE_WAIT BIT(4)
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27 | 27 |
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32 | 32 | */
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33 | 33 | #define TMIO_MMC_USE_BUSY_TIMEOUT BIT(5)
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34 | 34 |
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35 |
| -/* |
36 |
| - * Some controllers have CMD12 automatically |
37 |
| - * issue/non-issue register |
38 |
| - */ |
| 35 | +/* Some controllers have CMD12 automatically issue/non-issue register */ |
39 | 36 | #define TMIO_MMC_HAVE_CMD12_CTRL BIT(7)
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40 | 37 |
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41 | 38 | /* Controller has some SDIO status bits which must be 1 */
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42 | 39 | #define TMIO_MMC_SDIO_STATUS_SETBITS BIT(8)
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43 | 40 |
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44 |
| -/* |
45 |
| - * Some controllers have a 32-bit wide data port register |
46 |
| - */ |
| 41 | +/* Some controllers have a 32-bit wide data port register */ |
47 | 42 | #define TMIO_MMC_32BIT_DATA_PORT BIT(9)
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48 | 43 |
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49 |
| -/* |
50 |
| - * Some controllers allows to set SDx actual clock |
51 |
| - */ |
| 44 | +/* Some controllers allows to set SDx actual clock */ |
52 | 45 | #define TMIO_MMC_CLK_ACTUAL BIT(10)
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53 | 46 |
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54 | 47 | /* Some controllers have a CBSY bit */
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55 | 48 | #define TMIO_MMC_HAVE_CBSY BIT(11)
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56 | 49 |
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57 |
| -/* |
58 |
| - * data for the MMC controller |
59 |
| - */ |
60 | 50 | struct tmio_mmc_data {
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61 | 51 | void *chan_priv_tx;
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62 | 52 | void *chan_priv_rx;
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