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2 parents b19c3f4 + 4b1140a commit 7747151Copy full SHA for 7747151
drivers/pci/controller/dwc/pcie-uniphier.c
@@ -33,6 +33,10 @@
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#define PCL_PIPEMON 0x0044
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#define PCL_PCLK_ALIVE BIT(15)
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+#define PCL_MODE 0x8000
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+#define PCL_MODE_REGEN BIT(8)
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+#define PCL_MODE_REGVAL BIT(0)
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+
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#define PCL_APP_READY_CTRL 0x8008
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#define PCL_APP_LTSSM_ENABLE BIT(0)
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@@ -85,6 +89,12 @@ static void uniphier_pcie_init_rc(struct uniphier_pcie_priv *priv)
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{
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u32 val;
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+ /* set RC MODE */
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+ val = readl(priv->base + PCL_MODE);
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+ val |= PCL_MODE_REGEN;
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+ val &= ~PCL_MODE_REGVAL;
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+ writel(val, priv->base + PCL_MODE);
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/* use auxiliary power detection */
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val = readl(priv->base + PCL_APP_PM0);
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val |= PCL_SYS_AUX_PWR_DET;
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