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#define CRC_AUTOSUSPEND_DELAY 50
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+ static unsigned int burst_size ;
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+ module_param (burst_size , uint , 0644 );
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+ MODULE_PARM_DESC (burst_size , "Select burst byte size (0 unlimited)" );
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+
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struct stm32_crc {
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struct list_head list ;
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struct device * dev ;
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void __iomem * regs ;
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struct clk * clk ;
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+ spinlock_t lock ;
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};
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struct stm32_crc_list {
@@ -109,13 +114,16 @@ static int stm32_crc_init(struct shash_desc *desc)
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struct stm32_crc_desc_ctx * ctx = shash_desc_ctx (desc );
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struct stm32_crc_ctx * mctx = crypto_shash_ctx (desc -> tfm );
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struct stm32_crc * crc ;
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+ unsigned long flags ;
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crc = stm32_crc_get_next_crc ();
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if (!crc )
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return - ENODEV ;
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pm_runtime_get_sync (crc -> dev );
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+ spin_lock_irqsave (& crc -> lock , flags );
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+
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/* Reset, set key, poly and configure in bit reverse mode */
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writel_relaxed (bitrev32 (mctx -> key ), crc -> regs + CRC_INIT );
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writel_relaxed (bitrev32 (mctx -> poly ), crc -> regs + CRC_POL );
@@ -125,25 +133,30 @@ static int stm32_crc_init(struct shash_desc *desc)
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/* Store partial result */
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ctx -> partial = readl_relaxed (crc -> regs + CRC_DR );
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+ spin_unlock_irqrestore (& crc -> lock , flags );
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+
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pm_runtime_mark_last_busy (crc -> dev );
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pm_runtime_put_autosuspend (crc -> dev );
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return 0 ;
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}
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- static int stm32_crc_update (struct shash_desc * desc , const u8 * d8 ,
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- unsigned int length )
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+ static int burst_update (struct shash_desc * desc , const u8 * d8 ,
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+ size_t length )
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{
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struct stm32_crc_desc_ctx * ctx = shash_desc_ctx (desc );
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struct stm32_crc_ctx * mctx = crypto_shash_ctx (desc -> tfm );
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struct stm32_crc * crc ;
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+ unsigned long flags ;
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crc = stm32_crc_get_next_crc ();
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if (!crc )
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return - ENODEV ;
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pm_runtime_get_sync (crc -> dev );
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+ spin_lock_irqsave (& crc -> lock , flags );
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+
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/*
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* Restore previously calculated CRC for this context as init value
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* Restore polynomial configuration
@@ -182,12 +195,40 @@ static int stm32_crc_update(struct shash_desc *desc, const u8 *d8,
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/* Store partial result */
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ctx -> partial = readl_relaxed (crc -> regs + CRC_DR );
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+ spin_unlock_irqrestore (& crc -> lock , flags );
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+
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pm_runtime_mark_last_busy (crc -> dev );
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pm_runtime_put_autosuspend (crc -> dev );
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return 0 ;
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}
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+ static int stm32_crc_update (struct shash_desc * desc , const u8 * d8 ,
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+ unsigned int length )
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+ {
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+ const unsigned int burst_sz = burst_size ;
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+ unsigned int rem_sz ;
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+ const u8 * cur ;
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+ size_t size ;
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+ int ret ;
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+
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+ if (!burst_sz )
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+ return burst_update (desc , d8 , length );
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+
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+ /* Digest first bytes not 32bit aligned at first pass in the loop */
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+ size = min (length ,
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+ burst_sz + (unsigned int )d8 - ALIGN_DOWN ((unsigned int )d8 ,
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+ sizeof (u32 )));
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+ for (rem_sz = length , cur = d8 ; rem_sz ;
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+ rem_sz -= size , cur += size , size = min (rem_sz , burst_sz )) {
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+ ret = burst_update (desc , cur , size );
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+ if (ret )
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+ return ret ;
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+ }
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+
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+ return 0 ;
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+ }
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+
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static int stm32_crc_final (struct shash_desc * desc , u8 * out )
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{
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struct stm32_crc_desc_ctx * ctx = shash_desc_ctx (desc );
@@ -300,6 +341,8 @@ static int stm32_crc_probe(struct platform_device *pdev)
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pm_runtime_irq_safe (dev );
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pm_runtime_enable (dev );
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+ spin_lock_init (& crc -> lock );
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+
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platform_set_drvdata (pdev , crc );
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spin_lock (& crc_list .lock );
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