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Ansueldavem330
Ansuel
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davem330
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net: phy: at803x: better align function varibles to open parenthesis
Better align function variables to open parenthesis as suggested by checkpatch script for qca808x function to make code cleaner. For cable_test_get_status function some additional rework was needed to handle too long functions. Signed-off-by: Christian Marangi <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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‎drivers/net/phy/at803x.c

Lines changed: 37 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1781,27 +1781,27 @@ static int qca808x_phy_fast_retrain_config(struct phy_device *phydev)
17811781
return ret;
17821782

17831783
phy_write_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_TOP_OPTION1,
1784-
QCA808X_TOP_OPTION1_DATA);
1784+
QCA808X_TOP_OPTION1_DATA);
17851785
phy_write_mmd(phydev, MDIO_MMD_PMAPMD, QCA808X_PHY_MMD1_MSE_THRESHOLD_20DB,
1786-
QCA808X_MSE_THRESHOLD_20DB_VALUE);
1786+
QCA808X_MSE_THRESHOLD_20DB_VALUE);
17871787
phy_write_mmd(phydev, MDIO_MMD_PMAPMD, QCA808X_PHY_MMD1_MSE_THRESHOLD_17DB,
1788-
QCA808X_MSE_THRESHOLD_17DB_VALUE);
1788+
QCA808X_MSE_THRESHOLD_17DB_VALUE);
17891789
phy_write_mmd(phydev, MDIO_MMD_PMAPMD, QCA808X_PHY_MMD1_MSE_THRESHOLD_27DB,
1790-
QCA808X_MSE_THRESHOLD_27DB_VALUE);
1790+
QCA808X_MSE_THRESHOLD_27DB_VALUE);
17911791
phy_write_mmd(phydev, MDIO_MMD_PMAPMD, QCA808X_PHY_MMD1_MSE_THRESHOLD_28DB,
1792-
QCA808X_MSE_THRESHOLD_28DB_VALUE);
1792+
QCA808X_MSE_THRESHOLD_28DB_VALUE);
17931793
phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_1,
1794-
QCA808X_MMD3_DEBUG_1_VALUE);
1794+
QCA808X_MMD3_DEBUG_1_VALUE);
17951795
phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_4,
1796-
QCA808X_MMD3_DEBUG_4_VALUE);
1796+
QCA808X_MMD3_DEBUG_4_VALUE);
17971797
phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_5,
1798-
QCA808X_MMD3_DEBUG_5_VALUE);
1798+
QCA808X_MMD3_DEBUG_5_VALUE);
17991799
phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_3,
1800-
QCA808X_MMD3_DEBUG_3_VALUE);
1800+
QCA808X_MMD3_DEBUG_3_VALUE);
18011801
phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_6,
1802-
QCA808X_MMD3_DEBUG_6_VALUE);
1802+
QCA808X_MMD3_DEBUG_6_VALUE);
18031803
phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_2,
1804-
QCA808X_MMD3_DEBUG_2_VALUE);
1804+
QCA808X_MMD3_DEBUG_2_VALUE);
18051805

18061806
return 0;
18071807
}
@@ -1838,13 +1838,14 @@ static int qca808x_config_init(struct phy_device *phydev)
18381838

18391839
/* Active adc&vga on 802.3az for the link 1000M and 100M */
18401840
ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_ADDR_CLD_CTRL7,
1841-
QCA808X_8023AZ_AFE_CTRL_MASK, QCA808X_8023AZ_AFE_EN);
1841+
QCA808X_8023AZ_AFE_CTRL_MASK, QCA808X_8023AZ_AFE_EN);
18421842
if (ret)
18431843
return ret;
18441844

18451845
/* Adjust the threshold on 802.3az for the link 1000M */
18461846
ret = phy_write_mmd(phydev, MDIO_MMD_PCS,
1847-
QCA808X_PHY_MMD3_AZ_TRAINING_CTRL, QCA808X_MMD3_AZ_TRAINING_VAL);
1847+
QCA808X_PHY_MMD3_AZ_TRAINING_CTRL,
1848+
QCA808X_MMD3_AZ_TRAINING_VAL);
18481849
if (ret)
18491850
return ret;
18501851

@@ -1870,7 +1871,8 @@ static int qca808x_config_init(struct phy_device *phydev)
18701871

18711872
/* Configure adc threshold as 100mv for the link 10M */
18721873
return at803x_debug_reg_mask(phydev, QCA808X_PHY_DEBUG_ADC_THRESHOLD,
1873-
QCA808X_ADC_THRESHOLD_MASK, QCA808X_ADC_THRESHOLD_100MV);
1874+
QCA808X_ADC_THRESHOLD_MASK,
1875+
QCA808X_ADC_THRESHOLD_100MV);
18741876
}
18751877

18761878
static int qca808x_read_status(struct phy_device *phydev)
@@ -1883,7 +1885,7 @@ static int qca808x_read_status(struct phy_device *phydev)
18831885
return ret;
18841886

18851887
linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->lp_advertising,
1886-
ret & MDIO_AN_10GBT_STAT_LP2_5G);
1888+
ret & MDIO_AN_10GBT_STAT_LP2_5G);
18871889

18881890
ret = genphy_read_status(phydev);
18891891
if (ret)
@@ -1913,7 +1915,7 @@ static int qca808x_read_status(struct phy_device *phydev)
19131915
*/
19141916
if (qca808x_has_fast_retrain_or_slave_seed(phydev)) {
19151917
if (phydev->master_slave_state == MASTER_SLAVE_STATE_ERR ||
1916-
qca808x_is_prefer_master(phydev)) {
1918+
qca808x_is_prefer_master(phydev)) {
19171919
qca808x_phy_ms_seed_enable(phydev, false);
19181920
} else {
19191921
qca808x_phy_ms_seed_enable(phydev, true);
@@ -2070,18 +2072,22 @@ static int qca808x_cable_test_get_status(struct phy_device *phydev, bool *finish
20702072
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
20712073
qca808x_cable_test_result_trans(pair_d));
20722074

2073-
if (qca808x_cdt_fault_length_valid(pair_a))
2074-
ethnl_cable_test_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_A,
2075-
qca808x_cdt_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_A));
2076-
if (qca808x_cdt_fault_length_valid(pair_b))
2077-
ethnl_cable_test_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_B,
2078-
qca808x_cdt_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_B));
2079-
if (qca808x_cdt_fault_length_valid(pair_c))
2080-
ethnl_cable_test_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_C,
2081-
qca808x_cdt_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_C));
2082-
if (qca808x_cdt_fault_length_valid(pair_d))
2083-
ethnl_cable_test_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_D,
2084-
qca808x_cdt_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_D));
2075+
if (qca808x_cdt_fault_length_valid(pair_a)) {
2076+
val = qca808x_cdt_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_A);
2077+
ethnl_cable_test_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_A, val);
2078+
}
2079+
if (qca808x_cdt_fault_length_valid(pair_b)) {
2080+
val = qca808x_cdt_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_B);
2081+
ethnl_cable_test_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_B, val);
2082+
}
2083+
if (qca808x_cdt_fault_length_valid(pair_c)) {
2084+
val = qca808x_cdt_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_C);
2085+
ethnl_cable_test_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_C, val);
2086+
}
2087+
if (qca808x_cdt_fault_length_valid(pair_d)) {
2088+
val = qca808x_cdt_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_D);
2089+
ethnl_cable_test_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_D, val);
2090+
}
20852091

20862092
*finished = true;
20872093

@@ -2148,8 +2154,9 @@ static void qca808x_link_change_notify(struct phy_device *phydev)
21482154
* the interface device address is always phy address added by 1.
21492155
*/
21502156
mdiobus_c45_modify_changed(phydev->mdio.bus, phydev->mdio.addr + 1,
2151-
MDIO_MMD_PMAPMD, QCA8081_PHY_SERDES_MMD1_FIFO_CTRL,
2152-
QCA8081_PHY_FIFO_RSTN, phydev->link ? QCA8081_PHY_FIFO_RSTN : 0);
2157+
MDIO_MMD_PMAPMD, QCA8081_PHY_SERDES_MMD1_FIFO_CTRL,
2158+
QCA8081_PHY_FIFO_RSTN,
2159+
phydev->link ? QCA8081_PHY_FIFO_RSTN : 0);
21532160
}
21542161

21552162
static struct phy_driver at803x_driver[] = {

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