@@ -976,7 +976,7 @@ static struct rockchip_clk_branch px30_clk_pmu_branches[] __initdata = {
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GATE (0 , "pclk_cru_pmu" , "pclk_pmu_pre" , CLK_IGNORE_UNUSED , PX30_PMU_CLKGATE_CON (0 ), 8 , GFLAGS ),
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};
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- static const char * const px30_pmucru_critical_clocks [] __initconst = {
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+ static const char * const px30_cru_critical_clocks [] __initconst = {
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"aclk_bus_pre" ,
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"pclk_bus_pre" ,
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"hclk_bus_pre" ,
@@ -1021,6 +1021,9 @@ static void __init px30_clk_init(struct device_node *np)
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& px30_cpuclk_data , px30_cpuclk_rates ,
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ARRAY_SIZE (px30_cpuclk_rates ));
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+ rockchip_clk_protect_critical (px30_cru_critical_clocks ,
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+ ARRAY_SIZE (px30_cru_critical_clocks ));
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+
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rockchip_register_softrst (np , 12 , reg_base + PX30_SOFTRST_CON (0 ),
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ROCKCHIP_SOFTRST_HIWORD_MASK );
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@@ -1053,9 +1056,6 @@ static void __init px30_pmu_clk_init(struct device_node *np)
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rockchip_clk_register_branches (ctx , px30_clk_pmu_branches ,
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ARRAY_SIZE (px30_clk_pmu_branches ));
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- rockchip_clk_protect_critical (px30_pmucru_critical_clocks ,
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- ARRAY_SIZE (px30_pmucru_critical_clocks ));
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-
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rockchip_clk_of_add_provider (np , ctx );
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}
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CLK_OF_DECLARE (px30_cru_pmu , "rockchip,px30-pmucru" , px30_pmu_clk_init );
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