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The architecture does not specify whether interrupts are disabled as part
of the asynchronous reset or upon return from the PQAP/ZAPQ instruction.
If, however, PQAP/ZAPQ completes with APQSW response code 0 and the
interrupt bit in the status word is also 0, we know the interrupts are
disabled and we can go ahead and clean up the corresponding resources;
otherwise, we must wait until the asynchronous reset has completed.
Signed-off-by: Tony Krowiak <[email protected]>
Suggested-by: Halil Pasic <[email protected]>
Reviewed-by: Jason J. Herne <[email protected]>
Acked-by: Halil Pasic <[email protected]>
Acked-by: Janosch Frank <[email protected]>
Tested-by: Viktor Mihajlovski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Carstens <[email protected]>
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