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EDAC, pnd2: convert to use common P2SB accessor
Since we have a common P2SB accessor in tree we may use it instead of open coded variants. Replace custom code by p2sb_bar() call. Signed-off-by: Andy Shevchenko <[email protected]> Tested-by: Henning Schild <[email protected]> Reviewed-by: Tony Luck <[email protected]> Signed-off-by: Lee Jones <[email protected]>
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-39
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2 files changed

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-39
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drivers/edac/Kconfig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -263,6 +263,7 @@ config EDAC_I10NM
263263
config EDAC_PND2
264264
tristate "Intel Pondicherry2"
265265
depends on PCI && X86_64 && X86_MCE_INTEL
266+
select P2SB if X86
266267
help
267268
Support for error detection and correction on the Intel
268269
Pondicherry2 Integrated Memory Controller. This SoC IP is

drivers/edac/pnd2_edac.c

Lines changed: 16 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,8 @@
2828
#include <linux/bitmap.h>
2929
#include <linux/math64.h>
3030
#include <linux/mod_devicetable.h>
31+
#include <linux/platform_data/x86/p2sb.h>
32+
3133
#include <asm/cpu_device_id.h>
3234
#include <asm/intel-family.h>
3335
#include <asm/processor.h>
@@ -232,42 +234,14 @@ static u64 get_mem_ctrl_hub_base_addr(void)
232234
return U64_LSHIFT(hi.base, 32) | U64_LSHIFT(lo.base, 15);
233235
}
234236

235-
static u64 get_sideband_reg_base_addr(void)
236-
{
237-
struct pci_dev *pdev;
238-
u32 hi, lo;
239-
u8 hidden;
240-
241-
pdev = pci_get_device(PCI_VENDOR_ID_INTEL, 0x19dd, NULL);
242-
if (pdev) {
243-
/* Unhide the P2SB device, if it's hidden */
244-
pci_read_config_byte(pdev, 0xe1, &hidden);
245-
if (hidden)
246-
pci_write_config_byte(pdev, 0xe1, 0);
247-
248-
pci_read_config_dword(pdev, 0x10, &lo);
249-
pci_read_config_dword(pdev, 0x14, &hi);
250-
lo &= 0xfffffff0;
251-
252-
/* Hide the P2SB device, if it was hidden before */
253-
if (hidden)
254-
pci_write_config_byte(pdev, 0xe1, hidden);
255-
256-
pci_dev_put(pdev);
257-
return (U64_LSHIFT(hi, 32) | U64_LSHIFT(lo, 0));
258-
} else {
259-
return 0xfd000000;
260-
}
261-
}
262-
263237
#define DNV_MCHBAR_SIZE 0x8000
264238
#define DNV_SB_PORT_SIZE 0x10000
265239
static int dnv_rd_reg(int port, int off, int op, void *data, size_t sz, char *name)
266240
{
267241
struct pci_dev *pdev;
268242
void __iomem *base;
269-
u64 addr;
270-
unsigned long size;
243+
struct resource r;
244+
int ret;
271245

272246
if (op == 4) {
273247
pdev = pci_get_device(PCI_VENDOR_ID_INTEL, 0x1980, NULL);
@@ -279,20 +253,23 @@ static int dnv_rd_reg(int port, int off, int op, void *data, size_t sz, char *na
279253
} else {
280254
/* MMIO via memory controller hub base address */
281255
if (op == 0 && port == 0x4c) {
282-
addr = get_mem_ctrl_hub_base_addr();
283-
if (!addr)
256+
memset(&r, 0, sizeof(r));
257+
258+
r.start = get_mem_ctrl_hub_base_addr();
259+
if (!r.start)
284260
return -ENODEV;
285-
size = DNV_MCHBAR_SIZE;
261+
r.end = r.start + DNV_MCHBAR_SIZE - 1;
286262
} else {
287263
/* MMIO via sideband register base address */
288-
addr = get_sideband_reg_base_addr();
289-
if (!addr)
290-
return -ENODEV;
291-
addr += (port << 16);
292-
size = DNV_SB_PORT_SIZE;
264+
ret = p2sb_bar(NULL, 0, &r);
265+
if (ret)
266+
return ret;
267+
268+
r.start += (port << 16);
269+
r.end = r.start + DNV_SB_PORT_SIZE - 1;
293270
}
294271

295-
base = ioremap((resource_size_t)addr, size);
272+
base = ioremap(r.start, resource_size(&r));
296273
if (!base)
297274
return -ENODEV;
298275

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