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ukleinekUwe Kleine-König
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pwm-stm32: Make use of parametrised register definitions
There is no semantic change, but it is a nicer on the eyes of a reader, because TIM_CCR1 + 4 * ch encodes internal register knowledge, while TIM_CCRx(ch + 1) keeps that information completely in the header defining the registers. While I expected this to not result in any changes in the binary, gcc 13 (as provided by Debian in the gcc-13-arm-linux-gnueabihf 13.2.0-12cross1 package) compiles the new version with an allmodconfig to more compact code: $ source/scripts/bloat-o-meter drivers/pwm/pwm-stm32.o-pre drivers/pwm/pwm-stm32.o add/remove: 0/0 grow/shrink: 0/2 up/down: 0/-488 (-488) Function old new delta stm32_pwm_get_state 968 936 -32 stm32_pwm_apply_locked 1920 1464 -456 Signed-off-by: Uwe Kleine-König <[email protected]> Link: https://lore.kernel.org/r/d7ef7a6158df4ba6687233b0e00d37796b069fb3.1718791090.git.u.kleine-koenig@baylibre.com Signed-off-by: Uwe Kleine-König <[email protected]>
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drivers/pwm/pwm-stm32.c

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -368,7 +368,7 @@ static int stm32_pwm_config(struct stm32_pwm *priv, unsigned int ch,
368368
dty = mul_u64_u64_div_u64(duty_ns, clk_get_rate(priv->clk),
369369
(u64)NSEC_PER_SEC * (prescaler + 1));
370370

371-
regmap_write(priv->regmap, TIM_CCR1 + 4 * ch, dty);
371+
regmap_write(priv->regmap, TIM_CCRx(ch + 1), dty);
372372

373373
/* Configure output mode */
374374
shift = (ch & 0x1) * CCMR_CHANNEL_SHIFT;
@@ -390,9 +390,9 @@ static int stm32_pwm_set_polarity(struct stm32_pwm *priv, unsigned int ch,
390390
{
391391
u32 mask;
392392

393-
mask = TIM_CCER_CC1P << (ch * 4);
393+
mask = TIM_CCER_CCxP(ch + 1);
394394
if (priv->have_complementary_output)
395-
mask |= TIM_CCER_CC1NP << (ch * 4);
395+
mask |= TIM_CCER_CCxNP(ch + 1);
396396

397397
regmap_update_bits(priv->regmap, TIM_CCER, mask,
398398
polarity == PWM_POLARITY_NORMAL ? 0 : mask);
@@ -410,9 +410,9 @@ static int stm32_pwm_enable(struct stm32_pwm *priv, unsigned int ch)
410410
return ret;
411411

412412
/* Enable channel */
413-
mask = TIM_CCER_CC1E << (ch * 4);
413+
mask = TIM_CCER_CCxE(ch + 1);
414414
if (priv->have_complementary_output)
415-
mask |= TIM_CCER_CC1NE << (ch * 4);
415+
mask |= TIM_CCER_CCxNE(ch);
416416

417417
regmap_set_bits(priv->regmap, TIM_CCER, mask);
418418

@@ -430,9 +430,9 @@ static void stm32_pwm_disable(struct stm32_pwm *priv, unsigned int ch)
430430
u32 mask;
431431

432432
/* Disable channel */
433-
mask = TIM_CCER_CC1E << (ch * 4);
433+
mask = TIM_CCER_CCxE(ch + 1);
434434
if (priv->have_complementary_output)
435-
mask |= TIM_CCER_CC1NE << (ch * 4);
435+
mask |= TIM_CCER_CCxNE(ch + 1);
436436

437437
regmap_clear_bits(priv->regmap, TIM_CCER, mask);
438438

@@ -502,16 +502,16 @@ static int stm32_pwm_get_state(struct pwm_chip *chip,
502502
if (ret)
503503
goto out;
504504

505-
state->enabled = ccer & (TIM_CCER_CC1E << (ch * 4));
506-
state->polarity = (ccer & (TIM_CCER_CC1P << (ch * 4))) ?
505+
state->enabled = ccer & TIM_CCER_CCxE(ch + 1);
506+
state->polarity = (ccer & TIM_CCER_CCxP(ch + 1)) ?
507507
PWM_POLARITY_INVERSED : PWM_POLARITY_NORMAL;
508508
ret = regmap_read(priv->regmap, TIM_PSC, &psc);
509509
if (ret)
510510
goto out;
511511
ret = regmap_read(priv->regmap, TIM_ARR, &arr);
512512
if (ret)
513513
goto out;
514-
ret = regmap_read(priv->regmap, TIM_CCR1 + 4 * ch, &ccr);
514+
ret = regmap_read(priv->regmap, TIM_CCRx(ch + 1), &ccr);
515515
if (ret)
516516
goto out;
517517

@@ -712,7 +712,7 @@ static int stm32_pwm_suspend(struct device *dev)
712712
ccer = active_channels(priv);
713713

714714
for (i = 0; i < chip->npwm; i++) {
715-
mask = TIM_CCER_CC1E << (i * 4);
715+
mask = TIM_CCER_CCxE(i + 1);
716716
if (ccer & mask) {
717717
dev_err(dev, "PWM %u still in use by consumer %s\n",
718718
i, chip->pwms[i].label);

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