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Revert "firmware: qcom: scm: Add support for MC boot address API"
This reverts commits 55845f4 and c50031f, since this still causes a build failure when QCOM_SCM is a loadable module, or when CONFIG_SMP is disabled: ERROR: modpost: "cpu_logical_map" [drivers/firmware/qcom-scm.ko] undefined! This be done better for 5.17, but it's too late now to rework properly. Fixes: c50031f ("firmware: qcom: scm: Don't break compile test on non-ARM platforms") Fixes: 55845f4 ("firmware: qcom: scm: Add support for MC boot address API") Signed-off-by: Arnd Bergmann <[email protected]>
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-81
lines changed

2 files changed

+17
-81
lines changed

drivers/firmware/qcom_scm.c

Lines changed: 17 additions & 77 deletions
Original file line numberDiff line numberDiff line change
@@ -17,10 +17,6 @@
1717
#include <linux/reset-controller.h>
1818
#include <linux/arm-smccc.h>
1919

20-
#if defined(CONFIG_ARM) || defined(CONFIG_ARM64)
21-
#include <asm/smp_plat.h>
22-
#endif
23-
2420
#include "qcom_scm.h"
2521

2622
static bool download_mode = IS_ENABLED(CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT);
@@ -264,44 +260,15 @@ static bool __qcom_scm_is_call_available(struct device *dev, u32 svc_id,
264260
return ret ? false : !!res.result[0];
265261
}
266262

267-
#if defined(CONFIG_ARM) || defined(CONFIG_ARM64)
268-
static int __qcom_scm_set_boot_addr_mc(void *entry, const cpumask_t *cpus,
269-
unsigned int flags)
270-
{
271-
struct qcom_scm_desc desc = {
272-
.svc = QCOM_SCM_SVC_BOOT,
273-
.cmd = QCOM_SCM_BOOT_SET_ADDR_MC,
274-
.owner = ARM_SMCCC_OWNER_SIP,
275-
.arginfo = QCOM_SCM_ARGS(6),
276-
};
277-
unsigned int cpu;
278-
u64 map;
279-
280-
/* Need a device for DMA of the additional arguments */
281-
if (!__scm || __get_convention() == SMC_CONVENTION_LEGACY)
282-
return -EOPNOTSUPP;
283-
284-
desc.args[0] = virt_to_phys(entry);
285-
for_each_cpu(cpu, cpus) {
286-
map = cpu_logical_map(cpu);
287-
desc.args[1] |= BIT(MPIDR_AFFINITY_LEVEL(map, 0));
288-
desc.args[2] |= BIT(MPIDR_AFFINITY_LEVEL(map, 1));
289-
desc.args[3] |= BIT(MPIDR_AFFINITY_LEVEL(map, 2));
290-
}
291-
desc.args[4] = ~0ULL; /* Reserved for affinity level 3 */
292-
desc.args[5] = flags;
293-
294-
return qcom_scm_call(__scm->dev, &desc, NULL);
295-
}
296-
#else
297-
static inline int __qcom_scm_set_boot_addr_mc(void *entry, const cpumask_t *cpus,
298-
unsigned int flags)
299-
{
300-
return -EINVAL;
301-
}
302-
#endif
303-
304-
static int __qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
263+
/**
264+
* qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus
265+
* @entry: Entry point function for the cpus
266+
* @cpus: The cpumask of cpus that will use the entry point
267+
*
268+
* Set the Linux entry point for the SCM to transfer control to when coming
269+
* out of a power down. CPU power down may be executed on cpuidle or hotplug.
270+
*/
271+
int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
305272
{
306273
int ret;
307274
int flags = 0;
@@ -337,28 +304,17 @@ static int __qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
337304

338305
return ret;
339306
}
307+
EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr);
340308

341309
/**
342-
* qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus
310+
* qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
343311
* @entry: Entry point function for the cpus
344312
* @cpus: The cpumask of cpus that will use the entry point
345313
*
346-
* Set the Linux entry point for the SCM to transfer control to when coming
347-
* out of a power down. CPU power down may be executed on cpuidle or hotplug.
314+
* Set the cold boot address of the cpus. Any cpu outside the supported
315+
* range would be removed from the cpu present mask.
348316
*/
349-
int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
350-
{
351-
if (!cpus || cpumask_empty(cpus))
352-
return -EINVAL;
353-
354-
if (__qcom_scm_set_boot_addr_mc(entry, cpus, QCOM_SCM_BOOT_MC_FLAG_WARMBOOT))
355-
/* Fallback to old SCM call */
356-
return __qcom_scm_set_warm_boot_addr(entry, cpus);
357-
return 0;
358-
}
359-
EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr);
360-
361-
static int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
317+
int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
362318
{
363319
int flags = 0;
364320
int cpu;
@@ -375,6 +331,9 @@ static int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
375331
.owner = ARM_SMCCC_OWNER_SIP,
376332
};
377333

334+
if (!cpus || cpumask_empty(cpus))
335+
return -EINVAL;
336+
378337
for_each_cpu(cpu, cpus) {
379338
if (cpu < ARRAY_SIZE(scm_cb_flags))
380339
flags |= scm_cb_flags[cpu];
@@ -387,25 +346,6 @@ static int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
387346

388347
return qcom_scm_call_atomic(__scm ? __scm->dev : NULL, &desc, NULL);
389348
}
390-
391-
/**
392-
* qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
393-
* @entry: Entry point function for the cpus
394-
* @cpus: The cpumask of cpus that will use the entry point
395-
*
396-
* Set the cold boot address of the cpus. Any cpu outside the supported
397-
* range would be removed from the cpu present mask.
398-
*/
399-
int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
400-
{
401-
if (!cpus || cpumask_empty(cpus))
402-
return -EINVAL;
403-
404-
if (__qcom_scm_set_boot_addr_mc(entry, cpus, QCOM_SCM_BOOT_MC_FLAG_COLDBOOT))
405-
/* Fallback to old SCM call */
406-
return __qcom_scm_set_cold_boot_addr(entry, cpus);
407-
return 0;
408-
}
409349
EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);
410350

411351
/**

drivers/firmware/qcom_scm.h

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -78,12 +78,8 @@ extern int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc,
7878
#define QCOM_SCM_BOOT_SET_ADDR 0x01
7979
#define QCOM_SCM_BOOT_TERMINATE_PC 0x02
8080
#define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10
81-
#define QCOM_SCM_BOOT_SET_ADDR_MC 0x11
8281
#define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a
8382
#define QCOM_SCM_FLUSH_FLAG_MASK 0x3
84-
#define QCOM_SCM_BOOT_MC_FLAG_AARCH64 BIT(0)
85-
#define QCOM_SCM_BOOT_MC_FLAG_COLDBOOT BIT(1)
86-
#define QCOM_SCM_BOOT_MC_FLAG_WARMBOOT BIT(2)
8783

8884
#define QCOM_SCM_SVC_PIL 0x02
8985
#define QCOM_SCM_PIL_PAS_INIT_IMAGE 0x01

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