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bjorn-helgaasbjorn-helgaas
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Merge branch 'pci/misc'
- Constify pcibus_class (Heiner Kallweit) - Annotate pci_cache_line_size variables as __ro_after_init (Heiner Kallweit) - Clean up formatting of PCI accessor macros (Ilpo Järvinen) - Remove some OLPC dead code (Kunwu Chan) - Make pcie_bandwidth_capable() static (Ilpo Järvinen) * pci/misc: PCI: Make pcie_bandwidth_capable() static x86/pci: Remove OLPC dead code PCI: Clean up accessor macro formatting PCI/ERR: Cleanup misleading indentation inside if conditions PCI: Annotate pci_cache_line_size variables as __ro_after_init PCI: Constify pcibus_class
2 parents 375a99f + fe4a83e commit 7ecf13f

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6 files changed

+36
-32
lines changed

6 files changed

+36
-32
lines changed

‎arch/x86/pci/olpc.c

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -154,9 +154,6 @@ static const uint32_t ehci_hdr[] = { /* dev f function 4 - devfn = 7d */
154154
0x0, 0x40, 0x0, 0x40a, /* CapPtr INT-D, IRQA */
155155
0xc8020001, 0x0, 0x0, 0x0, /* Capabilities - 40 is R/O, 44 is
156156
mask 8103 (power control) */
157-
#if 0
158-
0x1, 0x40080000, 0x0, 0x0, /* EECP - see EHCI spec section 2.1.7 */
159-
#endif
160157
0x01000001, 0x0, 0x0, 0x0, /* EECP - see EHCI spec section 2.1.7 */
161158
0x2020, 0x0, 0x0, 0x0, /* (EHCI page 8) 60 SBRN (R/O),
162159
61 FLADJ (R/W), PORTWAKECAP */

‎drivers/pci/access.c

Lines changed: 27 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -36,30 +36,38 @@ DEFINE_RAW_SPINLOCK(pci_lock);
3636
int noinline pci_bus_read_config_##size \
3737
(struct pci_bus *bus, unsigned int devfn, int pos, type *value) \
3838
{ \
39-
int res; \
4039
unsigned long flags; \
4140
u32 data = 0; \
42-
if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
41+
int res; \
42+
\
43+
if (PCI_##size##_BAD) \
44+
return PCIBIOS_BAD_REGISTER_NUMBER; \
45+
\
4346
pci_lock_config(flags); \
4447
res = bus->ops->read(bus, devfn, pos, len, &data); \
4548
if (res) \
4649
PCI_SET_ERROR_RESPONSE(value); \
4750
else \
4851
*value = (type)data; \
4952
pci_unlock_config(flags); \
53+
\
5054
return res; \
5155
}
5256

5357
#define PCI_OP_WRITE(size, type, len) \
5458
int noinline pci_bus_write_config_##size \
5559
(struct pci_bus *bus, unsigned int devfn, int pos, type value) \
5660
{ \
57-
int res; \
5861
unsigned long flags; \
59-
if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
62+
int res; \
63+
\
64+
if (PCI_##size##_BAD) \
65+
return PCIBIOS_BAD_REGISTER_NUMBER; \
66+
\
6067
pci_lock_config(flags); \
6168
res = bus->ops->write(bus, devfn, pos, len, value); \
6269
pci_unlock_config(flags); \
70+
\
6371
return res; \
6472
}
6573

@@ -216,24 +224,27 @@ static noinline void pci_wait_cfg(struct pci_dev *dev)
216224
}
217225

218226
/* Returns 0 on success, negative values indicate error. */
219-
#define PCI_USER_READ_CONFIG(size, type) \
227+
#define PCI_USER_READ_CONFIG(size, type) \
220228
int pci_user_read_config_##size \
221229
(struct pci_dev *dev, int pos, type *val) \
222230
{ \
223-
int ret = PCIBIOS_SUCCESSFUL; \
224231
u32 data = -1; \
232+
int ret; \
233+
\
225234
if (PCI_##size##_BAD) \
226235
return -EINVAL; \
227-
raw_spin_lock_irq(&pci_lock); \
236+
\
237+
raw_spin_lock_irq(&pci_lock); \
228238
if (unlikely(dev->block_cfg_access)) \
229239
pci_wait_cfg(dev); \
230240
ret = dev->bus->ops->read(dev->bus, dev->devfn, \
231-
pos, sizeof(type), &data); \
232-
raw_spin_unlock_irq(&pci_lock); \
241+
pos, sizeof(type), &data); \
242+
raw_spin_unlock_irq(&pci_lock); \
233243
if (ret) \
234244
PCI_SET_ERROR_RESPONSE(val); \
235245
else \
236246
*val = (type)data; \
247+
\
237248
return pcibios_err_to_errno(ret); \
238249
} \
239250
EXPORT_SYMBOL_GPL(pci_user_read_config_##size);
@@ -243,15 +254,18 @@ EXPORT_SYMBOL_GPL(pci_user_read_config_##size);
243254
int pci_user_write_config_##size \
244255
(struct pci_dev *dev, int pos, type val) \
245256
{ \
246-
int ret = PCIBIOS_SUCCESSFUL; \
257+
int ret; \
258+
\
247259
if (PCI_##size##_BAD) \
248260
return -EINVAL; \
249-
raw_spin_lock_irq(&pci_lock); \
261+
\
262+
raw_spin_lock_irq(&pci_lock); \
250263
if (unlikely(dev->block_cfg_access)) \
251264
pci_wait_cfg(dev); \
252265
ret = dev->bus->ops->write(dev->bus, dev->devfn, \
253-
pos, sizeof(type), val); \
254-
raw_spin_unlock_irq(&pci_lock); \
266+
pos, sizeof(type), val); \
267+
raw_spin_unlock_irq(&pci_lock); \
268+
\
255269
return pcibios_err_to_errno(ret); \
256270
} \
257271
EXPORT_SYMBOL_GPL(pci_user_write_config_##size);

‎drivers/pci/pci.c

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -142,8 +142,8 @@ enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_DEFAULT;
142142
* the dfl or actual value as it sees fit. Don't forget this is
143143
* measured in 32-bit words, not bytes.
144144
*/
145-
u8 pci_dfl_cache_line_size = L1_CACHE_BYTES >> 2;
146-
u8 pci_cache_line_size;
145+
u8 pci_dfl_cache_line_size __ro_after_init = L1_CACHE_BYTES >> 2;
146+
u8 pci_cache_line_size __ro_after_init ;
147147

148148
/*
149149
* If we set up a device for bus mastering, we need to check the latency
@@ -6163,8 +6163,9 @@ EXPORT_SYMBOL(pcie_get_width_cap);
61636163
* and width, multiplying them, and applying encoding overhead. The result
61646164
* is in Mb/s, i.e., megabits/second of raw bandwidth.
61656165
*/
6166-
u32 pcie_bandwidth_capable(struct pci_dev *dev, enum pci_bus_speed *speed,
6167-
enum pcie_link_width *width)
6166+
static u32 pcie_bandwidth_capable(struct pci_dev *dev,
6167+
enum pci_bus_speed *speed,
6168+
enum pcie_link_width *width)
61686169
{
61696170
*speed = pcie_get_speed_cap(dev);
61706171
*width = pcie_get_width_cap(dev);

‎drivers/pci/pci.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -293,8 +293,6 @@ void pci_bus_put(struct pci_bus *bus);
293293
const char *pci_speed_string(enum pci_bus_speed speed);
294294
enum pci_bus_speed pcie_get_speed_cap(struct pci_dev *dev);
295295
enum pcie_link_width pcie_get_width_cap(struct pci_dev *dev);
296-
u32 pcie_bandwidth_capable(struct pci_dev *dev, enum pci_bus_speed *speed,
297-
enum pcie_link_width *width);
298296
void __pcie_print_link_status(struct pci_dev *dev, bool verbose);
299297
void pcie_report_downtraining(struct pci_dev *dev);
300298
void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);

‎drivers/pci/pcie/err.c

Lines changed: 3 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -116,9 +116,7 @@ static int report_mmio_enabled(struct pci_dev *dev, void *data)
116116

117117
device_lock(&dev->dev);
118118
pdrv = dev->driver;
119-
if (!pdrv ||
120-
!pdrv->err_handler ||
121-
!pdrv->err_handler->mmio_enabled)
119+
if (!pdrv || !pdrv->err_handler || !pdrv->err_handler->mmio_enabled)
122120
goto out;
123121

124122
err_handler = pdrv->err_handler;
@@ -137,9 +135,7 @@ static int report_slot_reset(struct pci_dev *dev, void *data)
137135

138136
device_lock(&dev->dev);
139137
pdrv = dev->driver;
140-
if (!pdrv ||
141-
!pdrv->err_handler ||
142-
!pdrv->err_handler->slot_reset)
138+
if (!pdrv || !pdrv->err_handler || !pdrv->err_handler->slot_reset)
143139
goto out;
144140

145141
err_handler = pdrv->err_handler;
@@ -158,9 +154,7 @@ static int report_resume(struct pci_dev *dev, void *data)
158154
device_lock(&dev->dev);
159155
pdrv = dev->driver;
160156
if (!pci_dev_set_io_state(dev, pci_channel_io_normal) ||
161-
!pdrv ||
162-
!pdrv->err_handler ||
163-
!pdrv->err_handler->resume)
157+
!pdrv || !pdrv->err_handler || !pdrv->err_handler->resume)
164158
goto out;
165159

166160
err_handler = pdrv->err_handler;

‎drivers/pci/probe.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,7 @@ static void release_pcibus_dev(struct device *dev)
9595
kfree(pci_bus);
9696
}
9797

98-
static struct class pcibus_class = {
98+
static const struct class pcibus_class = {
9999
.name = "pci_bus",
100100
.dev_release = &release_pcibus_dev,
101101
.dev_groups = pcibus_groups,

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