@@ -34,45 +34,45 @@ alternative_else_nop_endif
34
34
ldp x14, x15, [x1, #96]
35
35
ldp x16, x17, [x1, #112]
36
36
37
- mov x18 , #(PAGE_SIZE - 128 )
37
+ add x0, x0, #256
38
38
add x1, x1, #128
39
39
1:
40
- subs x18 , x18 , # 128
40
+ tst x0, #(PAGE_SIZE - 1)
41
41
42
42
alternative_if ARM64_HAS_NO_HW_PREFETCH
43
43
prfm pldl1strm, [x1, #384]
44
44
alternative_else_nop_endif
45
45
46
- stnp x2 , x3 , [ x0 ]
46
+ stnp x2, x3, [x0, #-256 ]
47
47
ldp x2, x3, [x1]
48
- stnp x4 , x5 , [ x0 , # 16 ]
48
+ stnp x4, x5, [x0, #16 - 256 ]
49
49
ldp x4, x5, [x1, #16]
50
- stnp x6 , x7 , [ x0 , # 32 ]
50
+ stnp x6, x7, [x0, #32 - 256 ]
51
51
ldp x6, x7, [x1, #32]
52
- stnp x8 , x9 , [ x0 , # 48 ]
52
+ stnp x8, x9, [x0, #48 - 256 ]
53
53
ldp x8, x9, [x1, #48]
54
- stnp x10 , x11 , [ x0 , # 64 ]
54
+ stnp x10, x11, [x0, #64 - 256 ]
55
55
ldp x10, x11, [x1, #64]
56
- stnp x12 , x13 , [ x0 , # 80 ]
56
+ stnp x12, x13, [x0, #80 - 256 ]
57
57
ldp x12, x13, [x1, #80]
58
- stnp x14 , x15 , [ x0 , # 96 ]
58
+ stnp x14, x15, [x0, #96 - 256 ]
59
59
ldp x14, x15, [x1, #96]
60
- stnp x16 , x17 , [ x0 , # 112 ]
60
+ stnp x16, x17, [x0, #112 - 256 ]
61
61
ldp x16, x17, [x1, #112]
62
62
63
63
add x0, x0, #128
64
64
add x1, x1, #128
65
65
66
- b.gt 1b
66
+ b.ne 1b
67
67
68
- stnp x2 , x3 , [ x0 ]
69
- stnp x4 , x5 , [ x0 , # 16 ]
70
- stnp x6 , x7 , [ x0 , # 32 ]
71
- stnp x8 , x9 , [ x0 , # 48 ]
72
- stnp x10 , x11 , [ x0 , # 64 ]
73
- stnp x12 , x13 , [ x0 , # 80 ]
74
- stnp x14 , x15 , [ x0 , # 96 ]
75
- stnp x16 , x17 , [ x0 , # 112 ]
68
+ stnp x2, x3, [x0, #-256 ]
69
+ stnp x4, x5, [x0, #16 - 256 ]
70
+ stnp x6, x7, [x0, #32 - 256 ]
71
+ stnp x8, x9, [x0, #48 - 256 ]
72
+ stnp x10, x11, [x0, #64 - 256 ]
73
+ stnp x12, x13, [x0, #80 - 256 ]
74
+ stnp x14, x15, [x0, #96 - 256 ]
75
+ stnp x16, x17, [x0, #112 - 256 ]
76
76
77
77
ret
78
78
ENDPROC(copy_page)
0 commit comments