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arm64: implement PKEYS support
Implement the PKEYS interface, using the Permission Overlay Extension. Signed-off-by: Joey Gouly <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: Will Deacon <[email protected]> Reviewed-by: Catalin Marinas <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
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arch/arm64/include/asm/mmu.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,7 @@ typedef struct {
2525
refcount_t pinned;
2626
void *vdso;
2727
unsigned long flags;
28+
u8 pkey_allocation_map;
2829
} mm_context_t;
2930

3031
/*

arch/arm64/include/asm/mmu_context.h

Lines changed: 45 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,12 +15,12 @@
1515
#include <linux/sched/hotplug.h>
1616
#include <linux/mm_types.h>
1717
#include <linux/pgtable.h>
18+
#include <linux/pkeys.h>
1819

1920
#include <asm/cacheflush.h>
2021
#include <asm/cpufeature.h>
2122
#include <asm/daifflags.h>
2223
#include <asm/proc-fns.h>
23-
#include <asm-generic/mm_hooks.h>
2424
#include <asm/cputype.h>
2525
#include <asm/sysreg.h>
2626
#include <asm/tlbflush.h>
@@ -175,9 +175,36 @@ init_new_context(struct task_struct *tsk, struct mm_struct *mm)
175175
{
176176
atomic64_set(&mm->context.id, 0);
177177
refcount_set(&mm->context.pinned, 0);
178+
179+
/* pkey 0 is the default, so always reserve it. */
180+
mm->context.pkey_allocation_map = BIT(0);
181+
182+
return 0;
183+
}
184+
185+
static inline void arch_dup_pkeys(struct mm_struct *oldmm,
186+
struct mm_struct *mm)
187+
{
188+
/* Duplicate the oldmm pkey state in mm: */
189+
mm->context.pkey_allocation_map = oldmm->context.pkey_allocation_map;
190+
}
191+
192+
static inline int arch_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
193+
{
194+
arch_dup_pkeys(oldmm, mm);
195+
178196
return 0;
179197
}
180198

199+
static inline void arch_exit_mmap(struct mm_struct *mm)
200+
{
201+
}
202+
203+
static inline void arch_unmap(struct mm_struct *mm,
204+
unsigned long start, unsigned long end)
205+
{
206+
}
207+
181208
#ifdef CONFIG_ARM64_SW_TTBR0_PAN
182209
static inline void update_saved_ttbr0(struct task_struct *tsk,
183210
struct mm_struct *mm)
@@ -267,6 +294,23 @@ static inline unsigned long mm_untag_mask(struct mm_struct *mm)
267294
return -1UL >> 8;
268295
}
269296

297+
/*
298+
* Only enforce protection keys on the current process, because there is no
299+
* user context to access POR_EL0 for another address space.
300+
*/
301+
static inline bool arch_vma_access_permitted(struct vm_area_struct *vma,
302+
bool write, bool execute, bool foreign)
303+
{
304+
if (!system_supports_poe())
305+
return true;
306+
307+
/* allow access if the VMA is not one from this process */
308+
if (foreign || vma_is_foreign(vma))
309+
return true;
310+
311+
return por_el0_allows_pkey(vma_pkey(vma), write, execute);
312+
}
313+
270314
#include <asm-generic/mmu_context.h>
271315

272316
#endif /* !__ASSEMBLY__ */

arch/arm64/include/asm/pgtable.h

Lines changed: 21 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,7 @@
3434

3535
#include <asm/cmpxchg.h>
3636
#include <asm/fixmap.h>
37+
#include <asm/por.h>
3738
#include <linux/mmdebug.h>
3839
#include <linux/mm_types.h>
3940
#include <linux/sched.h>
@@ -149,6 +150,24 @@ static inline pteval_t __phys_to_pte_val(phys_addr_t phys)
149150
#define pte_accessible(mm, pte) \
150151
(mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid(pte))
151152

153+
static inline bool por_el0_allows_pkey(u8 pkey, bool write, bool execute)
154+
{
155+
u64 por;
156+
157+
if (!system_supports_poe())
158+
return true;
159+
160+
por = read_sysreg_s(SYS_POR_EL0);
161+
162+
if (write)
163+
return por_elx_allows_write(por, pkey);
164+
165+
if (execute)
166+
return por_elx_allows_exec(por, pkey);
167+
168+
return por_elx_allows_read(por, pkey);
169+
}
170+
152171
/*
153172
* p??_access_permitted() is true for valid user mappings (PTE_USER
154173
* bit set, subject to the write permission check). For execute-only
@@ -159,7 +178,8 @@ static inline pteval_t __phys_to_pte_val(phys_addr_t phys)
159178
#define pte_access_permitted_no_overlay(pte, write) \
160179
(((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER)) && (!(write) || pte_write(pte)))
161180
#define pte_access_permitted(pte, write) \
162-
pte_access_permitted_no_overlay(pte, write)
181+
(pte_access_permitted_no_overlay(pte, write) && \
182+
por_el0_allows_pkey(FIELD_GET(PTE_PO_IDX_MASK, pte_val(pte)), write, false))
163183
#define pmd_access_permitted(pmd, write) \
164184
(pte_access_permitted(pmd_pte(pmd), (write)))
165185
#define pud_access_permitted(pud, write) \

arch/arm64/include/asm/pkeys.h

Lines changed: 108 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,108 @@
1+
/* SPDX-License-Identifier: GPL-2.0 */
2+
/*
3+
* Copyright (C) 2023 Arm Ltd.
4+
*
5+
* Based on arch/x86/include/asm/pkeys.h
6+
*/
7+
8+
#ifndef _ASM_ARM64_PKEYS_H
9+
#define _ASM_ARM64_PKEYS_H
10+
11+
#define ARCH_VM_PKEY_FLAGS (VM_PKEY_BIT0 | VM_PKEY_BIT1 | VM_PKEY_BIT2)
12+
13+
#define arch_max_pkey() 8
14+
15+
int arch_set_user_pkey_access(struct task_struct *tsk, int pkey,
16+
unsigned long init_val);
17+
18+
static inline bool arch_pkeys_enabled(void)
19+
{
20+
return false;
21+
}
22+
23+
static inline int vma_pkey(struct vm_area_struct *vma)
24+
{
25+
return (vma->vm_flags & ARCH_VM_PKEY_FLAGS) >> VM_PKEY_SHIFT;
26+
}
27+
28+
static inline int arch_override_mprotect_pkey(struct vm_area_struct *vma,
29+
int prot, int pkey)
30+
{
31+
if (pkey != -1)
32+
return pkey;
33+
34+
return vma_pkey(vma);
35+
}
36+
37+
static inline int execute_only_pkey(struct mm_struct *mm)
38+
{
39+
// Execute-only mappings are handled by EPAN/FEAT_PAN3.
40+
WARN_ON_ONCE(!cpus_have_final_cap(ARM64_HAS_EPAN));
41+
42+
return -1;
43+
}
44+
45+
#define mm_pkey_allocation_map(mm) (mm)->context.pkey_allocation_map
46+
#define mm_set_pkey_allocated(mm, pkey) do { \
47+
mm_pkey_allocation_map(mm) |= (1U << pkey); \
48+
} while (0)
49+
#define mm_set_pkey_free(mm, pkey) do { \
50+
mm_pkey_allocation_map(mm) &= ~(1U << pkey); \
51+
} while (0)
52+
53+
static inline bool mm_pkey_is_allocated(struct mm_struct *mm, int pkey)
54+
{
55+
/*
56+
* "Allocated" pkeys are those that have been returned
57+
* from pkey_alloc() or pkey 0 which is allocated
58+
* implicitly when the mm is created.
59+
*/
60+
if (pkey < 0 || pkey >= arch_max_pkey())
61+
return false;
62+
63+
return mm_pkey_allocation_map(mm) & (1U << pkey);
64+
}
65+
66+
/*
67+
* Returns a positive, 3-bit key on success, or -1 on failure.
68+
*/
69+
static inline int mm_pkey_alloc(struct mm_struct *mm)
70+
{
71+
/*
72+
* Note: this is the one and only place we make sure
73+
* that the pkey is valid as far as the hardware is
74+
* concerned. The rest of the kernel trusts that
75+
* only good, valid pkeys come out of here.
76+
*/
77+
u8 all_pkeys_mask = GENMASK(arch_max_pkey() - 1, 0);
78+
int ret;
79+
80+
if (!arch_pkeys_enabled())
81+
return -1;
82+
83+
/*
84+
* Are we out of pkeys? We must handle this specially
85+
* because ffz() behavior is undefined if there are no
86+
* zeros.
87+
*/
88+
if (mm_pkey_allocation_map(mm) == all_pkeys_mask)
89+
return -1;
90+
91+
ret = ffz(mm_pkey_allocation_map(mm));
92+
93+
mm_set_pkey_allocated(mm, ret);
94+
95+
return ret;
96+
}
97+
98+
static inline int mm_pkey_free(struct mm_struct *mm, int pkey)
99+
{
100+
if (!mm_pkey_is_allocated(mm, pkey))
101+
return -EINVAL;
102+
103+
mm_set_pkey_free(mm, pkey);
104+
105+
return 0;
106+
}
107+
108+
#endif /* _ASM_ARM64_PKEYS_H */

arch/arm64/include/asm/por.h

Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,33 @@
1+
/* SPDX-License-Identifier: GPL-2.0 */
2+
/*
3+
* Copyright (C) 2023 Arm Ltd.
4+
*/
5+
6+
#ifndef _ASM_ARM64_POR_H
7+
#define _ASM_ARM64_POR_H
8+
9+
#define POR_BITS_PER_PKEY 4
10+
#define POR_ELx_IDX(por_elx, idx) (((por_elx) >> ((idx) * POR_BITS_PER_PKEY)) & 0xf)
11+
12+
static inline bool por_elx_allows_read(u64 por, u8 pkey)
13+
{
14+
u8 perm = POR_ELx_IDX(por, pkey);
15+
16+
return perm & POE_R;
17+
}
18+
19+
static inline bool por_elx_allows_write(u64 por, u8 pkey)
20+
{
21+
u8 perm = POR_ELx_IDX(por, pkey);
22+
23+
return perm & POE_W;
24+
}
25+
26+
static inline bool por_elx_allows_exec(u64 por, u8 pkey)
27+
{
28+
u8 perm = POR_ELx_IDX(por, pkey);
29+
30+
return perm & POE_X;
31+
}
32+
33+
#endif /* _ASM_ARM64_POR_H */

arch/arm64/include/uapi/asm/mman.h

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,4 +7,13 @@
77
#define PROT_BTI 0x10 /* BTI guarded page */
88
#define PROT_MTE 0x20 /* Normal Tagged mapping */
99

10+
/* Override any generic PKEY permission defines */
11+
#define PKEY_DISABLE_EXECUTE 0x4
12+
#define PKEY_DISABLE_READ 0x8
13+
#undef PKEY_ACCESS_MASK
14+
#define PKEY_ACCESS_MASK (PKEY_DISABLE_ACCESS |\
15+
PKEY_DISABLE_WRITE |\
16+
PKEY_DISABLE_READ |\
17+
PKEY_DISABLE_EXECUTE)
18+
1019
#endif /* ! _UAPI__ASM_MMAN_H */

arch/arm64/mm/mmu.c

Lines changed: 45 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,7 @@
2525
#include <linux/vmalloc.h>
2626
#include <linux/set_memory.h>
2727
#include <linux/kfence.h>
28+
#include <linux/pkeys.h>
2829

2930
#include <asm/barrier.h>
3031
#include <asm/cputype.h>
@@ -1549,3 +1550,47 @@ void __cpu_replace_ttbr1(pgd_t *pgdp, bool cnp)
15491550

15501551
cpu_uninstall_idmap();
15511552
}
1553+
1554+
#ifdef CONFIG_ARCH_HAS_PKEYS
1555+
int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, unsigned long init_val)
1556+
{
1557+
u64 new_por = POE_RXW;
1558+
u64 old_por;
1559+
u64 pkey_shift;
1560+
1561+
if (!system_supports_poe())
1562+
return -ENOSPC;
1563+
1564+
/*
1565+
* This code should only be called with valid 'pkey'
1566+
* values originating from in-kernel users. Complain
1567+
* if a bad value is observed.
1568+
*/
1569+
if (WARN_ON_ONCE(pkey >= arch_max_pkey()))
1570+
return -EINVAL;
1571+
1572+
/* Set the bits we need in POR: */
1573+
new_por = POE_RXW;
1574+
if (init_val & PKEY_DISABLE_WRITE)
1575+
new_por &= ~POE_W;
1576+
if (init_val & PKEY_DISABLE_ACCESS)
1577+
new_por &= ~POE_RW;
1578+
if (init_val & PKEY_DISABLE_READ)
1579+
new_por &= ~POE_R;
1580+
if (init_val & PKEY_DISABLE_EXECUTE)
1581+
new_por &= ~POE_X;
1582+
1583+
/* Shift the bits in to the correct place in POR for pkey: */
1584+
pkey_shift = pkey * POR_BITS_PER_PKEY;
1585+
new_por <<= pkey_shift;
1586+
1587+
/* Get old POR and mask off any old bits in place: */
1588+
old_por = read_sysreg_s(SYS_POR_EL0);
1589+
old_por &= ~(POE_MASK << pkey_shift);
1590+
1591+
/* Write old part along with new part: */
1592+
write_sysreg_s(old_por | new_por, SYS_POR_EL0);
1593+
1594+
return 0;
1595+
}
1596+
#endif

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