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445 | 445 | status = "disabled";
|
446 | 446 | };
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447 | 447 |
|
| 448 | + i2c0: i2c@11007000 { |
| 449 | + compatible = "mediatek,mt6795-i2c", "mediatek,mt8173-i2c"; |
| 450 | + reg = <0 0x11007000 0 0x70>, <0 0x11000100 0 0x80>; |
| 451 | + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>; |
| 452 | + clock-div = <16>; |
| 453 | + clocks = <&pericfg CLK_PERI_I2C0>, <&pericfg CLK_PERI_AP_DMA>; |
| 454 | + clock-names = "main", "dma"; |
| 455 | + #address-cells = <1>; |
| 456 | + #size-cells = <0>; |
| 457 | + status = "disabled"; |
| 458 | + }; |
| 459 | + |
| 460 | + i2c1: i2c@11008000 { |
| 461 | + compatible = "mediatek,mt6795-i2c", "mediatek,mt8173-i2c"; |
| 462 | + reg = <0 0x11008000 0 0x70>, <0 0x11000180 0 0x80>; |
| 463 | + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_LOW>; |
| 464 | + clock-div = <16>; |
| 465 | + clocks = <&pericfg CLK_PERI_I2C1>, <&pericfg CLK_PERI_AP_DMA>; |
| 466 | + clock-names = "main", "dma"; |
| 467 | + #address-cells = <1>; |
| 468 | + #size-cells = <0>; |
| 469 | + status = "disabled"; |
| 470 | + }; |
| 471 | + |
| 472 | + i2c2: i2c@11009000 { |
| 473 | + compatible = "mediatek,mt6795-i2c", "mediatek,mt8173-i2c"; |
| 474 | + reg = <0 0x11009000 0 0x70>, <0 0x11000200 0 0x80>; |
| 475 | + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>; |
| 476 | + clock-div = <16>; |
| 477 | + clocks = <&pericfg CLK_PERI_I2C2>, <&pericfg CLK_PERI_AP_DMA>; |
| 478 | + clock-names = "main", "dma"; |
| 479 | + #address-cells = <1>; |
| 480 | + #size-cells = <0>; |
| 481 | + status = "disabled"; |
| 482 | + }; |
| 483 | + |
| 484 | + i2c3: i2c@11010000 { |
| 485 | + compatible = "mediatek,mt6795-i2c", "mediatek,mt8173-i2c"; |
| 486 | + reg = <0 0x11010000 0 0x70>, <0 0x11000280 0 0x80>; |
| 487 | + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_LOW>; |
| 488 | + clock-div = <16>; |
| 489 | + clocks = <&pericfg CLK_PERI_I2C3>, <&pericfg CLK_PERI_AP_DMA>; |
| 490 | + clock-names = "main", "dma"; |
| 491 | + #address-cells = <1>; |
| 492 | + #size-cells = <0>; |
| 493 | + status = "disabled"; |
| 494 | + }; |
| 495 | + |
| 496 | + i2c4: i2c@11011000 { |
| 497 | + compatible = "mediatek,mt6795-i2c", "mediatek,mt8173-i2c"; |
| 498 | + reg = <0 0x11011000 0 0x70>, <0 0x11000300 0 0x80>; |
| 499 | + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_LOW>; |
| 500 | + clock-div = <16>; |
| 501 | + clocks = <&pericfg CLK_PERI_I2C4>, <&pericfg CLK_PERI_AP_DMA>; |
| 502 | + clock-names = "main", "dma"; |
| 503 | + #address-cells = <1>; |
| 504 | + #size-cells = <0>; |
| 505 | + status = "disabled"; |
| 506 | + }; |
| 507 | + |
448 | 508 | mmc0: mmc@11230000 {
|
449 | 509 | compatible = "mediatek,mt6795-mmc";
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450 | 510 | reg = <0 0x11230000 0 0x1000>;
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