@@ -27,40 +27,40 @@ __cmpxchg_u32(volatile int *p, int old, int new)
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unsigned long tmp , result ;
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__asm__ __volatile__(
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- "1: l32ex %0 , %3 \n"
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- " bne %0 , %4 , 2f\n"
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- " mov %1 , %2 \n"
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- " s32ex %1 , %3 \n"
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- " getex %1 \n"
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- " beqz %1 , 1b\n"
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+ "1: l32ex %[result] , %[addr] \n"
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+ " bne %[result] , %[cmp] , 2f\n"
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+ " mov %[tmp] , %[new] \n"
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+ " s32ex %[tmp] , %[addr] \n"
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+ " getex %[tmp] \n"
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+ " beqz %[tmp] , 1b\n"
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"2:\n"
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- : "=&a" (result ), "=&a" (tmp )
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- : "a" (new ), "a" (p ), "a" (old )
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+ : [ result ] "=&a" (result ), [ tmp ] "=&a" (tmp )
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+ : [ new ] "a" (new ), [ addr ] "a" (p ), [ cmp ] "a" (old )
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: "memory"
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);
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return result ;
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#elif XCHAL_HAVE_S32C1I
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__asm__ __volatile__(
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- " wsr %2 , scompare1\n"
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- " s32c1i %0 , %1 , 0\n"
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- : "+a" (new )
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- : "a" (p ), "a" (old )
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+ " wsr %[cmp] , scompare1\n"
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+ " s32c1i %[new] , %[addr] , 0\n"
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+ : [ new ] "+a" (new )
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+ : [ addr ] "a" (p ), [ cmp ] "a" (old )
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: "memory"
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);
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return new ;
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#else
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__asm__ __volatile__(
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" rsil a15, " __stringify (TOPLEVEL )"\n"
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- " l32i %0 , %1 , 0\n"
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- " bne %0 , %2 , 1f\n"
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- " s32i %3 , %1 , 0\n"
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+ " l32i %[old] , %[addr] , 0\n"
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+ " bne %[old] , %[cmp] , 1f\n"
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+ " s32i %[new] , %[addr] , 0\n"
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"1:\n"
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" wsr a15, ps\n"
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" rsync\n"
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- : "= & a " (old)
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- : " a " (p), " a " (old), " r " (new)
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+ : [ old ] "= & a " (old)
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+ : [ addr ] "a" (p ), [ cmp ] "a " (old), [new] " r " (new)
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: " a15 ", " memory ");
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return old ;
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#endif
@@ -129,40 +129,40 @@ static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
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unsigned long tmp , result ;
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__asm__ __volatile__(
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- "1: l32ex %0 , %3 \n"
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- " mov %1 , %2 \n"
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- " s32ex %1 , %3 \n"
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- " getex %1 \n"
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- " beqz %1 , 1b\n"
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- : "=&a" (result ), "=&a" (tmp )
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- : "a" (val ), "a" (m )
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+ "1: l32ex %[result] , %[addr] \n"
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+ " mov %[tmp] , %[val] \n"
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+ " s32ex %[tmp] , %[addr] \n"
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+ " getex %[tmp] \n"
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+ " beqz %[tmp] , 1b\n"
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+ : [ result ] "=&a" (result ), [ tmp ] "=&a" (tmp )
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+ : [ val ] "a" (val ), [ addr ] "a" (m )
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: "memory"
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);
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return result ;
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#elif XCHAL_HAVE_S32C1I
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unsigned long tmp , result ;
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__asm__ __volatile__(
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- "1: l32i %1 , %2 , 0\n"
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- " mov %0 , %3 \n"
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- " wsr %1 , scompare1\n"
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- " s32c1i %0 , %2 , 0\n"
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- " bne %0 , %1 , 1b\n"
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- : "=&a" (result ), "=&a" (tmp )
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- : "a" (m ), "a" (val )
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+ "1: l32i %[tmp] , %[addr] , 0\n"
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+ " mov %[result] , %[val] \n"
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+ " wsr %[tmp] , scompare1\n"
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+ " s32c1i %[result] , %[addr] , 0\n"
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+ " bne %[result] , %[tmp] , 1b\n"
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+ : [ result ] "=&a" (result ), [ tmp ] "=&a" (tmp )
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+ : [ addr ] "a" (m ), [ val ] "a" (val )
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: "memory"
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);
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return result ;
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#else
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unsigned long tmp ;
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__asm__ __volatile__(
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" rsil a15, " __stringify (TOPLEVEL )"\n"
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- " l32i %0 , %1 , 0\n"
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- " s32i %2 , %1 , 0\n"
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+ " l32i %[tmp] , %[addr] , 0\n"
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+ " s32i %[val] , %[addr] , 0\n"
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" wsr a15, ps\n"
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" rsync\n"
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- : "= & a " (tmp)
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- : " a " (m), " a " (val)
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+ : [ tmp ] "= & a " (tmp)
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+ : [ addr ] "a" (m ), [ val ] "a" (val )
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: "a15 ", " memory ");
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return tmp ;
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#endif
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