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Bartosz Golaszewskiandersson
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arm64: dts: qcom: sa8775p-ride-r3: add new board file
Revision 3 of the sa8775p-ride board uses a different PHY for the two ethernet ports and supports 2.5G speed. Create a new file for the board reflecting the changes. Signed-off-by: Bartosz Golaszewski <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
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arch/arm64/boot/dts/qcom/Makefile

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@@ -113,6 +113,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sa8295p-adp.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sa8540p-ride.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sa8775p-ride.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sa8775p-ride-r3.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sc7180-acer-aspire1.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1.dtb
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2023, Linaro Limited
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*/
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/dts-v1/;
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#include "sa8775p-ride.dtsi"
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/ {
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model = "Qualcomm SA8775P Ride Rev3";
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compatible = "qcom,sa8775p-ride-r3", "qcom,sa8775p";
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};
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&ethernet0 {
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phy-mode = "2500base-x";
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};
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&ethernet1 {
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phy-mode = "2500base-x";
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};
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&mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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sgmii_phy0: phy@8 {
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compatible = "ethernet-phy-id31c3.1c33";
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reg = <0x8>;
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device_type = "ethernet-phy";
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interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>;
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reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>;
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reset-assert-us = <11000>;
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reset-deassert-us = <70000>;
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};
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sgmii_phy1: phy@0 {
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compatible = "ethernet-phy-id31c3.1c33";
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reg = <0x0>;
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device_type = "ethernet-phy";
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interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>;
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reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>;
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reset-assert-us = <11000>;
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reset-deassert-us = <70000>;
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};
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};

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